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| RAiO RA8806 Two Layers Character/Graphic LCD Controller Specification Preliminary Version 1.0 March 25, 2008 RAiO Technology Inc. (c)Copyright RAiO Technology Inc. 2008 RAiO TECHNOLOGY INC. 1/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Update History Version 1.0 Date March 25, 2008 Preliminary Version Description RAiO TECHNOLOGY INC. 2/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Chapter Content Page 1. 2. 3. 4. General Description ......................................................................................5 Feature ..........................................................................................................5 Block Diagram ...............................................................................................6 Pin Definition .................................................................................................7 4-1 4-2 4-3 4-4 4-5 MPU Interface .............................................................................................................7 Clock Interface............................................................................................................7 Peripheral Interface....................................................................................................8 LCD Driver Interface...................................................................................................9 Power ..........................................................................................................................9 5. Register Description ...................................................................................10 5-1 Register List Table ...................................................................................................10 5-2 Register Description ................................................................................................12 6. Function Description ..................................................................................26 6-1 MPU Interface ...........................................................................................................26 6-1-1 6-1-2 6-1-3 6-1-4 6-2-1 6-2-2 6-2-3 6-2-4 MPU Type ................................................................................................................................... 26 Command Write ......................................................................................................................... 29 Memory Write/Read ................................................................................................................... 30 Status Read ................................................................................................................................ 30 Display Resolution .................................................................................................................... 34 Display Window and Active Window....................................................................................... 34 Com/Seg Scan Direction........................................................................................................... 37 Idle Time Counter (ITCR) .......................................................................................................... 37 6-2 Driver Interface .........................................................................................................31 6-3 Display Data RAM (DDRAM) ....................................................................................39 6-3-1 Display Layer and Display Mode Selection ............................................................................ 39 6-3-2 Access Memory Selection ........................................................................................................ 39 6-4 Touch Panel ..............................................................................................................40 6-4-1 Auto Mode .................................................................................................................................. 42 6-4-2 Manual Mode .............................................................................................................................. 44 6-4-2-1 External Interrupt Mode .................................................................................................... 44 6-4-2-2 Polling Mode ..................................................................................................................... 47 6-5 Key-Scan ...................................................................................................................50 6-6 Clock and Reset .......................................................................................................57 6-6-1 OSC Circuit................................................................................................................................. 57 6-6-2 External Clock............................................................................................................................ 57 6-6-3 Reset ........................................................................................................................................... 58 6-7 Power ........................................................................................................................59 6-7-1 6-7-2 6-7-3 6-7-4 Power Architecture ................................................................................................................... 59 3V Application Circuit ............................................................................................................... 59 5V Application Circuit ............................................................................................................... 60 Sleep Mode................................................................................................................................. 61 3/174 RAiO TECHNOLOGY INC. www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6-8 Interrupt and Busy ...................................................................................................62 6-8-1 Interrupt ...................................................................................................................................... 62 6-8-2 Busy ............................................................................................................................................ 63 6-9 PWM ..........................................................................................................................66 6-10 Display Function.....................................................................................................69 6-10-1 Character/Graphic Mode........................................................................................................... 69 6-10-1-1 Graphic Display ................................................................................................................ 69 6-10-1-2 Half Size Font ................................................................................................................... 70 6-10-1-3 Full Size Font.................................................................................................................... 71 6-10-1-4 Bold and Inverse............................................................................................................... 71 6-10-1-5 Two Layer Display ............................................................................................................ 72 6-10-1-6 Line Gap ........................................................................................................................... 73 6-10-2 Gray Scale Display .................................................................................................................... 73 6-10-3 Font Size Adjustment and Font Write-Time............................................................................ 76 6-10-4 Font Vertical Display ................................................................................................................. 78 6-11 User-Defined Font ..................................................................................................80 6-11-1 Create Font in CGRAM.............................................................................................................. 80 6-11-2 Create Font in DDRAM .............................................................................................................. 83 6-11-3 Create Symbol............................................................................................................................ 87 6-12 Scroll Function .......................................................................................................89 6-12-1 Horizontal Scrolling................................................................................................................... 89 6-12-2 Vertical Scrolling ....................................................................................................................... 91 6-13 Cursor......................................................................................................................92 6-13-1 Cursor Position and Shift ......................................................................................................... 92 6-13-2 Full Alignment............................................................................................................................ 92 6-13-3 Cursor Blinking.......................................................................................................................... 95 6-13-4 Cursor Width and Height .......................................................................................................... 95 6-14 Extension Mode for Display...................................................................................96 6-15 Eliminating Flicker Mode .......................................................................................99 7. Package Information .................................................................................100 7-1 7-2 7-3 7-4 7-5 Bonding Pad ...........................................................................................................100 Pad X/Y Coordinate ................................................................................................101 Pin Assignment ......................................................................................................102 Package Dimension ...............................................................................................103 Part Number............................................................................................................107 8. Electrical Characteristic ...........................................................................108 8-1 Absolute Maximum Ratings ..................................................................................108 8-2 DC Characteristic ...................................................................................................109 Appendix A . Application Circuit ..................................................................110 Appendix B . Frame Rate Table ....................................................................111 Appendix C . Font Table - ASCII ...................................................................114 Appendix D . Font Table - GB Code .............................................................122 Appendix E . Font Table - BIG-5 Code .........................................................144 RAiO TECHNOLOGY INC. 4/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 1. General Description RA8806 is a LCD controller for Dot-Matrix type STN-LCD which supports both character and graphic mode display. The RA8806 has built-in two Display Data RAM(DDRAM) for two layers display, and has an embedded font ROM which is capable of displaying the full-size(16x16 pixels) traditional Chinese font(BIG5, 13973 characters) or simplified Chinese font(GB, 9216 characters). RA8806 also contains 4x256 embedded half-size (8x16 pixels) characters that can display ISO8859-1 ~ 4(or called Latin-1 ~ 4) alphabets using at most of English speaking and Europe countries. RA8806 supports 8080/6800 MPU protocol interface, which is capable of switching the interface with 4-bits or 8-bits data bus. For LCD driver interface, it can be set to 4-bits or 8-bits data bus. The maximum resolution of RA8806 is 320x240 pixels in normal mode, and 640x240 or 320x480 pixels in extension mode. By using the font rotation mode, which can implement the "vertical" font display. The embedded intelligence touch panel controller provides the 4-wires resistance-type Touch Panel interface. The PWM output provides an easy contrast or back-light control method for LCD panel. RA8806 also provides a 4x8(32 keys) or 8x8(64 keys) powerful and smart Key-Scan interface includes long-key function. The flexible interrupt and polling mechanism can make it easy to control touch panel, key-scan and power mode functions. Also it can greatly reduce the MPU loading. The embedded 512Byte character generation RAM (CGRAM) allows user to build maximum 16 full-size or 32 half-size fonts. Even with the single layer display, the other unused layer can be used as CGRAM too. In this setting, the amazing 300 full-size and 600 half-size user created fonts or symbols are supported. In addition, RA8806 supports 4-gray-scale display in FRC mode. The bit-arrangement is compatible for most gray level picture and easy to program. RA8806 also includes many useful functions, like area scroll, font inverse, font bold, font enlargement, memory clear function and so on. An innovative mechanism of "noflicker" mode is provided in RA8806. It's effective for removing the "flicker" in frequently display data Read/Write. User can easily improve the display quality by RA8806. RA8806 is a powerful and flexible LCD controller. It provides the total solution for the middle-size mono LCD controller. User can save large amount of time for system development and the cost of hardware system. 2. Feature Support text and graphics mode. Maximum resolution: 320x240 with 2-Layers overlay display (AND, OR, NOR and XOR). Extension Mode: 640x240 or 320x480 with single layer. Support 4/8-bits of 6800/8080 MPU interface and 4/8-bits driver interface. Built-In smart 8x8 or 4x8 key-scan circuit with programmable long key function. Support horizontal and vertical area scrolling Built-In GB/BIG5 and ASCII font ROM. Support 90, 180, 270 font and display rotation. Support font enlargement(x1 ~ x4 in Horizontal and Vertical direction) Built-In 512Byte CGRAM for user-created font: _ Half-size: 8x16 _ Full-size: 16x16 Un-used DDRAM could be used as a CGRAM of 300 full-size or 600 half-size characters. Flexible interrupt/polling mechanism for touch panel, key-scan and power mode programming. Support font alignment function. Support 4-gray-scale display (FRC mode). Support bold font and row-row interval setting Built-In smart resister type touch panel controller. Built-In PWM for contrast or back-light control Power mode to reduce power consumption. Clock source: 4M ~ 12MHz crystal or external clock Built-In a 5V-to-3V DC/DC converter Power supply: 2.4V ~ 5.5V Package: Die, LQFP-100, TQFP-80 Pins RAiO TECHNOLOGY INC. 5/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 3. Block Diagram Figure 3-1 is the internal block diagram of RA8806. The RA8806 consists of two Display Data RAM, Font ROM, Register Block, Analog to Digital Converter (ADC), Pulse Width Modulation (PWM), LCD driver interface and microprocessor interface. Figure 3-2 is the system block for application of RA8806. KIN[7:0] KOUT[7:0] Smart Key-Scan Controller Display Data RAM (9.6KByte x 2) DDRAM1 DDRAM2 LP FR YD ZDOFF XCK LD[7:0] Display Timing Generator PWM_OUT PWM Controller Registers XG Oscillator XD 512KByte Font ROM 512Byte CGRAM Touch Panel X1 X2 Y1 Y2 MCU Interface System Configure Controller ZCS1 CS2 ZWR ZRD RS INT BUSY DATA[7:0] ZRST Figure 3-1 : RA8806 Block Diagram MI DW DB CLK_OUT LCD Driver MPU LCD Panel RA8806 8x8 Key Pad Booster (Contrast Adj.) LCD Driver H/W Set Up X'tal Touch Panel Figure 3-2 : RA8806 System Block Diagram RAiO TECHNOLOGY INC. 6/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 4. Pin Definition 4-1 MPU Interface Pin Name DATA[7:0] I/O I/O Description Data Bus These are data bus for data transfer between MPU and RA8806. The high nibble DATA[7:4] is output and should keep floating when 4-bits data bus mode is used. Enable/Read Enable When MPU interface(I/F) is 8080 series, this pin (ZRD) is used as data read, active low. When MPU I/F is 6800 series, this pin (EN) is used as Enable, active high. Write/Read-Write When MPU I/F is 8080 series, this pin (ZWR) is used as data write, active low. When MPU I/F is 6800 series, this pin(ZRW) is used as data read/write control. Active high for read and active low for write. Command / Data Select Input The pin is used to select command/data cycle. RS = 0, data Read/Write cycle is selected. RS = 1, status read/command write cycle is selected. In 8080 interface, usually it connects to "A0" address pin. RS 0 0 1 1 ZWR 0 1 0 1 Access Cycle Data Write Data Read CMD Write Status Read ZRD (EN) I ZWR (ZRW) I RS I ZCS1 CS2 INT I O BUSY O Chip Select Input The MPU interface of RA8806 is active only when ZCS1 is low and CS2 is high. Interrupt Signal Output The interrupt output for MPU to indicate the status of RA8806. It could be setup active high or low. Busy Signal Output This is a busy output to indicate the RA8806 is in busy state. It could be set to active high or active low by register. The RA8806 can't access MPU cycle when BUSY pin is active. It could be used for MPU to poll busy status by connecting it to I/O port. 4-2 Clock Interface Pin Name XG I/O I Description X'tal Input In internal clock mode, this pin connects to external X'tal(4M ~ 12MHz). In external clock mode, it connects to external clock. X'tal Output This pin connects to external X'tal(4M ~ 12MHz). In external clock mode, it keeps floating. XD O RAiO TECHNOLOGY INC. 7/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 4-3 Peripheral Interface Pin Name I/O Description Reset Signal Input This active-low input performs a hardware reset on the RA8806. It is a Schmitt-trigger input with pull-up resistor for enhanced noise immunity; however, care should be taken to ensure that it is not triggered if the supply voltage is lowered. Touch Panel Input The left analog input pin(XL) of 4-wires touch panel. Touch Panel Input The right analog input pin(XR) of 4-wires touch panel. Touch Panel Input The top analog input pin(YU) of 4-wires touch panel. If user want to use Touch Panel function, please add a 39K~51Kohm external pull-up resistor on this pin. Touch Panel Input The bottom analog input pin(YD) of 4-wires touch panel. PWM Output Signal This output signal is used to control back-light module or booster circuit. Key Pad Input These pins are keypad inputs with pull-up resistors. For un-used input, please keep floating. Key Pad Output These pins are keypad outputs. For un-used pin, please keep floating. Clock Output This is a multi-function output pin that depending on the value of register REG[01h] Bit-6. REG[01h] Bit-6 = 0: The pin is the output of internal system clock. REG[01h] Bit-6 = 1: The pin indicate the SLEEP state of Status Register(0: Normal Mode, 1: Sleep Mode). LCD Driver Data Bus Select This pin is used to select data bus of LCD driver is 8-bits or 4-bits: 0 : LCD driver data bus is 4-bits, LD[3:0] is used. 1 : LCD driver data bus is 8-bits, LD[7:0] is used. When 4-bits data bus is used, LD[7:4] need to keep floating. RA8806T1N does not support this function, its LCD driver data bus is fix 4-bits. MPU Type Select This pin is used to select MPU interface protocol: 0 : Intel 8080 series MPU interface. 1 : Motorola 6800 series MPU interface. 8080/6800 MPU Data Bus Select This pin is used to select data bus width. 0 : 4-bits MPU I/F, DATA[3:0] is used. 1 : 8-bits MPU I/F, DATA[7:0] is used. When 4-bits data bus is used, DATA[7:4] need to keep floating. ZRST I X1 X2 I I Y1 I Y2 PWM_OUT KIN[7:0] KOUT[7:0] I O I O CLK_OUT O DW I MI I DB I RAiO TECHNOLOGY INC. 8/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 4-4 LCD Driver Interface Pin Name YD I/O O Description Start Signal of LCD Per Frame YD is the reset pulse for the COM driver, it's active during the last COM period of each frame and latched by LP signal. LCD AC Wave Output This signal controls the Level Shift of LCD driver. Normally it works as VDD/GND interlacing to prevent the liquid cystal polarization. LCD Common Latch LP is the latch pulse for the shift register of SEG driver to SEG output. It is also used as COM driver shift clock. LCD Clock XCK is the latch pulse of the LCD driver data(LD[7:0]) for SEG driver. The falling edge of XCK will latch the LD[7:0] (or LD[3:0] for 4-bits driver) to the shift register. LCD Display Off This signal is used to control the LCD Display On or Off. 0 : Display off. 1 : Display on. LCD Driver Data Bus When 8-bits LCD driver IC is used. LD[7:0] are connected to LCD driver data bus. When 4-bits driver is used, LD[3:0] are connected to LCD driver data bus and LD[7:4] keep floating. RA8806T1N supports LD[3:0] only. FR O LP O XCK O ZDOFF O LD[7:0] O 4-5 Power Pin Name VDDH I/O P Description 5V Power This is the source power for DC to DC converter. In 5V power application, it is connected to 5V. If 3V application is used, then keep this pin floating. 3V Power If the pin VDDH connects to 5V power then the pin will driving 3V power, and must add an external 1uF capacitor to GND. If 3V application is used, then connecting this pin to external 3V power directly. Power for I/O Buffer VDDP can be 3V or 5V. Analog Power for ADC Touch Panel Controller AVDD can be 3V or 5V. Ground Analog Ground for ADC Touch Panel Controller Connect this pin to 0V earth ground(GND). Test Mode This pin is used for test only. It has internal pull-low and need to keep floating. Test Pin The pin is used for test function, It has internal pull-low and need to keep floating. VDD P VDDP AVDD GND GNDP AGND TESTMD P P P P I TESTI I RAiO TECHNOLOGY INC. 9/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 5. Register Description 5-1 Register List Table Table 5-1 : Cycle List Table CYC_NAME CMD STATUS DATW DATR RS 1 1 0 0 ZWR 0 1 0 1 Description Command write cycle, for writting register number(REG#) Status read cycle, using to check Interrupt or Sleep status. Data write cycle, using to write register data or memory data. Data read cycle, using to read register data or memory data. Table 5-2 : Register Table REG# -00h 01h 03h 0Fh 10h 11h 12h 20h 21h 30h 31h 40h 50h 60h 61h 62h 70h 71h 72h 80h 90h A0h A1h A2h A3h A4h B0h B1h Name STATUS WLCR MISC ADSR INTR WCCR CHWI MAMR AWRR DWWR AWBR DWHR AWLR AWTR CURX BGSG EDSG CURY BGCM EDCM BTMR ITCR KSCR1 KSCR2 KSDR0 KSDR1 KSDR2 MWCR MRCR D7 MBUSY PWR NO_ FLICKER SCR_PEND -CUR_INC CURH3 CUR_HV --AWB7 DWH7 -AWT7 --EDSG7 CURY7 BGCM7 EDCM7 BLKT7 ITC7 KEY_EN KWAK_EN KSD07 KSD17 KSD27 MWD7 MRD7 D6 SBUSY LINEAR CLKO_SEL -WAKI_EN FULL_OFS CURH2 DISPMD2 --AWB6 DWH6 -AWT6 --EDSG6 CURY6 BGCM6 EDCM6 BLKT6 ITC6 KEY4X8 -KSD06 KSD16 KSD26 MWD6 MRD6 D5 SLEEP SRST BUSY_ LEV -KEYI_EN BIT_REV CURH1 DISPMD1 AWR5 DWW5 AWB5 DWH5 AWL5 AWT5 CURX5 BGSG5 EDSG5 CURY5 BGCM5 EDCM5 BLKT5 ITC5 KSAMP1 -KSD05 KSD15 KSD25 MWD5 MRD5 D4 D3 D2 WAKE_STS D1 KS_STS GBLK SDIR SCR_HV KEY_STS CUR_BLK ROWH 1 MW_MD1 AWR1 DWW 1 AWB1 DWH1 AWL1 AWT1 CURX1 BGSG1 EDSG1 CURY1 BGCM1 EDCM1 BLKT1 ITC1 KF1 KEYNO1 KSD01 KSD11 KSD21 MWD1 MRD1 D0 TP_STS GINV CDIR SCR_EN TP_STS --ROWH 0 MW_MD0 AWR0 DWW 0 AWB0 DWH0 AWL0 AWT0 CURX0 BGSG0 EDSG0 CURY0 BGCM0 EDCM0 BLKT0 ITC0 KF0 KEYNO0 KSD00 KSD10 KSD20 MWD0 MRD0 Default -00h 04h 00h 00h 00h 00h 11h 27h 27h EFh EFh 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h --- -INT_LEV -TPI_EN BOLD CURH0 DISPMD0 AWR4 DWW 4 AWB4 DWH4 AWL4 AWT4 CURX4 BGSG4 EDSG4 CURY4 BGCM4 EDCM4 BLKT4 ITC4 KSAMP0 -KSD04 KSD14 KSD24 MWD4 MRD4 TEXT_MD ZDOFF XCK_SEL1 XCK_SEL0 BIT_INV TP_ACT T90DEG ROWH3 L_MIX1 AWR3 DWW 3 AWB3 DWH3 AWL3 AWT3 CURX3 BGSG3 EDSG3 CURY3 BGCM3 EDCM3 BLKT3 ITC3 LKEY_EN LKEY_T1 KSD03 KSD13 KSD23 MWD3 MRD3 SCR_DIR WAK_STS CUR_EN ROWH 2 L_MIX 0 AWR2 DWW 2 AWB2 DWH2 AWL2 AWT2 CURX2 BGSG2 EDSG2 CURY2 BGCM2 EDCM2 BLKT2 ITC2 KF2 LKEY_T0 KSD02 KSD12 KSD22 MWD2 MRD2 RAiO TECHNOLOGY INC. 10/174 www.raio.com.tw RA8806 Preliminary Version 1.0 (Continued) REG# C0h C1h C2h C3h C4h D0h D1h E0h F0h F1h Two Layers Character/Graphic LCD Controller Table 5-3 : Register Table Name TPCR1 TPXR TPYR TPZR TPCR2 PCR PDCR PNTR FNCR FVHT D7 TP_EN TPX9 TPY9 TPX1 MTP_MD PWM_EN PDUTY7 PND7 ISO8859_E N FH1 D6 TP_SMP2 TPX8 TPY8 TPX0 -PWM_DIS_ LEV PDUTY6 PND6 -FH0 D5 TP_SMP1 TPX7 TPY7 ---PDUTY5 PND5 -FV1 D4 TP_SMP0 TPX6 TPY6 ---PDUTY4 PND4 -FV0 D3 TPWAK _EN TPX5 TPY5 TPY1 -PCLK_R3 PDUTY3 PND3 MCLR -- D2 ACLK2 TPX4 TPY4 TPY0 -PCLK_R2 PDUTY2 PND2 ASC -- D1 ACLK1 TPX3 TPY3 -MTP_PH1 PCLK_R1 PDUTY1 PND1 D0 ACLK0 TPX2 TPY2 -MTP_PH2 PCLK_R0 PDUTY0 PND0 Default 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h ASC_SEL1 ASC_SEL0 --- RAiO TECHNOLOGY INC. 11/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 5-2 Register Description STATUS Register (RS = 1, ZWR = 1) Bit 7 Description Memory Write Busy Flag 0 : Not busy. 1 : Busy, when font write or memory clear cycle is running, the busy flag = 1. SCAN_BUSY 0 : Not busy. 1 : When driver scan logic is not idle(i.e. XCK is active), SCAN_BUSY = 1. SLEEP 0 : Normal mode. 1 : Sleep mode. NA Wakeup Status bit (The same with REG[0Fh] Bit-2.) KS Status bit (The same with REG[0Fh] Bit-1.) TP Status bit (The same with REG[0Fh] Bit-0.) Access R 6 R 5 4-3 2 1 0 R R R R R REG [00h] Whole Chip LCD Controller Register (WLCR) Bit Description Power Mode 0 : Normal Mode. All of the functions of RA8806 are available in this mode. 1 : Sleep Mode. When RA8806 is in Sleep mode, all of functions enter off mode, except the wake-up trigger block. If wake-up event occurred, RA8806 would wake-up and return to Normal mode. Linear Decode mode This bit is used to define the Font ROM address mapping rule. The standard product is set to 0. And 1 for special application that when user a want to create a new Mask Code. 0 : BIG5/GB ROM mapping rule. 1 : User-defined ROM mapping rule. Software Reset 0 : Normal Operation. 1 : Reset all registers except the contents of Display Data RAM (Only work at Normal mode). When this bit set to "1", the next MPU cycle for RA8806 have to wait 3 clocks at least. Reserved Text Mode Selection 0 : Graphical Mode. The written data will be treated as a bit-map pattern. 1 : Text Mode. The written data will be treated as an ASCII, BIG5 or GB code. Default Access 7 0 R/W 6 0 R/W 5 0 R/W 4 0 R 3 0 R/W RAiO TECHNOLOGY INC. 12/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Set Display On/Off Selection The bit is used to control LCD Driver Interface signal - "DISP_OFF". 0 : DISP_OFF pin output low(Display Off). 1 : DISP_OFF pin output high(Display On). Blink Mode Selection 0 : Normal Display. 1 : Blink Full Screen. The blink time is set by register BTMR. Inverse Mode Selection 0 : Normal Display. 1 : Inverse Full Screen. It will cause the display inversed. 2 0 R/W 1 0 R/W 0 0 R/W REG [01h] Misc. Register (MISC) Bit 7 Description Eliminating Flicker 1 : Eliminating flicker mode, scan will auto-pending when busy. 0 : Normal mode. Clock Output (Pin CLK_OUT) Control 1 : The pin "CLK_OUT" indicates the SLEEP state of Status Register(0: Normal Mode, 1: Sleep Mode). 0 : The pin "CLK_OUT" is the output of Internal system clock. Busy Polarity (for "BUSY" pin) 1 : Set Active High. 0 : Set Active Low. Interrupt Polarity (for "INT" pin) 1 : Set Active High. 0 : Set Active Low. Driver Clock Selection These two bits are used to select the clock frequency of XCK. 0 0 : XCK = CLK/8 0 1 : XCK = CLK/4 (Default) 1 0 : XCK = CLK/2 1 1 : XCK = CLK The "CLK" means system clock. SEG Scan Direction(SDIR) 0 : SEG order is 0 ~ 319. 1 : SEG order is 319 ~ 0. COM Scan Direction(CDIR) 0 : COM order 0 ~ 239. 1 : COM order 239 ~ 0. Default 0 Access R/W 6 0 R/W 5 0 R/W 4 0 R/W 3-2 01 R/W 1 0 R/W 0 0 R/W REG [03h] Advance Display Setup Register (ADSR) Bit 7 Description Scroll Function Pending 1 : Scroll function pending 0 : Scroll function keep active Note: When SCR_HV(Bit-1) and SCR_EN(Bit-0) are changed, the function does not support. Default Access 0 R/W RAiO TECHNOLOGY INC. 13/174 www.raio.com.tw RA8806 Preliminary Version 1.0 6-4 3 Reserved BIT_ORDER(Set driver data output bit order) 1 : Inverse driver output data order(Bit-7 to Bit-0, Bit-6 to Bit-1 and so on) 0 : Normal Mode SCR_DIR(Scroll Direction) When SCR_HV = 0(Horizontal Scroll) 0 : Left Right. 1 : Right Left. When SCR_HV = 1(Vertical Scroll) 0 : Top Bottom. 1 : Bottom Top. SCR_HV(Scroll Horizontal/Vertical) 0 : Segment Scrolling(Horizontal). 1 : Common Scrolling(Vertical). SCR_EN(Scroll Enable) 1 : Scroll function enable. 0 : Scroll function disable. Two Layers Character/Graphic LCD Controller 000 0 R R/W 2 0 R/W 1 0 R/W 0 0 R/W REG [0Fh] Interrupt Setup and Status Register (INTR) Bit 7 6 Reserved Wakeup Interrupt Mask 1 : Enable wake-up Interrupt. 0 : Disable wake-up Interrupt. Key-Scan Interrupt Mask 1 : Enable Key-Scan Interrupt. 0 : Disable Key-Scan Interrupt. Touch Panel Interrupt Mask 1 : Generate interrupt output if touch panel was detected. 0 : Don't generate interrupt output if touch panel was detected. Touch Panel Event(Only activate in TP Manual mode) 1 : Touch panel is touched. 0 : Touch panel is not touched. Wakeup Interrupt Status bit 1 : Interrupt that indicate wake-up event happen from Sleep mode. 0 : No wake-up interrupt happen. User must write "0" to clear the Status bit. Key-Scan Interrupt Status bit 1 : Key-Scan Detects Key Input. 0 : Key-Scan doesn't Detect Key Input. User must write "0" to clear the Status bit. Touch Panel Detect Status bit 1 : Touch Panel Touched. 0 : Touch Panel Untouched. User must write "0" to clear the Status bit. Description Default 0 0 Access R R/W 5 0 R/W 4 3 0 0 R/W R 2 0 R/W 1 0 R/W 0 0 R/W RAiO TECHNOLOGY INC. 14/174 www.raio.com.tw RA8806 Preliminary Version 1.0 REG [10h] Whole Chip Cursor Control Register (WCCR) Bit 7 Description CUR_INC (Auto Increase Cursor Position in Reading/Writing DDRAM Operation.) 1 : Disable. 0 : Enable(Auto Increase). FULL_OFS (Full-size and Half-size Character Alignment) 1 : Enable, in Full-size and Half-size character mixed mode. Chinese always start at full-size alignment. 0 : Disable. Reversed Data Write mode 0 : Store Current Data to DDRAM Directly. 1 : Store Current Data to DDRAM Inversely.(i.e. 01101101 10010010) Bold Font (Character Mode Only) 1 : Bold Font 0 : Normal Font Font Rotate mode(T90DEG) 1 : Font rotates 90 degree. (See Section 6-10-4 for detail) 0 : Normal font. Cursor Display 1 : Set Cursor Display On. 0 : Set Cursor Display Off. Cursor Blinking 1 : Blink Cursor. The blink time is determined by register BTMR. 0 : Normal. Reserved Default 0 Access R/W Two Layers Character/Graphic LCD Controller 6 0 R/W 5 0 R/W 4 0 R/W 3 2 0 0 R/W R/W 1 0 0 0 R/W R REG [11h] Cursor Height and Word Interval Register (CHWI) Bit Description Set Cursor Height 0000 b Height = 1 pixel. 0001 b Height = 2 pixels. 0010 b Height = 3 pixels. : : 1111 b Height = 16 pixels. Note: In normal font, the cursor width fixed to one byte(8 pixels). And cursor's height is from 1~16pixels that depends on Bit[7:4]. In vertical font, the cursor height fixed to 16 pixels, and width is from 1~8 pixels that depends on Bit[6:4]. Set Line Gap 0000 b Gap = 1 pixel. 0001 b Gap = 2 pixels. 0010 b Gap = 3 pixels. : : 1111 b Gap = 16 pixels. Default Access 7-4 0000 R/W 3-0 0000 R/W RAiO TECHNOLOGY INC. 15/174 www.raio.com.tw RA8806 Preliminary Version 1.0 REG [12h] Memory Access Mode Register (MAMR) Bit Description Cursor Auto Shifting Direction 0 : Cursor moves horizontally (left to right) first then vertically (top to down). 1 : Cursor moves vertically first then horizontally. Note: In graphic mode, the cursor moving is treated as unit of bytes in horizontal direction. At vertical direction, it's treated as unit of bit. At text mode, the bit is ignored, and the cursor moving is always in horizontal direction. Display Layer and Display Mode Selection 0 0 0 : Gray Mode. In this mode, each pixel consists with 2 continuous bits in memory data. With the FRC methodology, 4-level-gray mode is implemented. The bit mapping is list as below. bit1 bit0 Gray --------------------------------------------------0 0 Level1 (Lightest) 0 1 Level2 1 0 Level3 1 1 Level4 (Darkest) 6-4 Note: Gray mode doesn't support text-mode input. 0 0 1 : Show DDRAM1 data on screen. 0 1 0 : Show DRRAM2 data on screen. 0 1 1 : Show Two Layer Mode. The display rule depends on Bit-3 and Bit-2 as following. 1 0 X : NA. 1 1 0 : Extension Mode (1), the panel will show both DDRAM1 and DDRAM2 data on the screen. The RA8806 is available for 640x240 pixels panel. 1 1 1 : Extension Mode (2), the panel will show both DDRAM1 and DDRAM2 on the screen. The RA8806 is available for 320x480 pixels panel. Two Layer Mode Selection Combine the data of DDRAM1 and DDRAM2 on the screen when Bit[6:4] is set as "011". 3-2 0 0 : DDRAM1 "OR" DDRAM2. 0 1 : DDRAM1 "XOR" DDRAM2. 1 0 : DDRAM1 "NOR" DDRAM2. 1 1 : DDRAM1 "AND" DDRAM2. MPU Read/Write Layer Selection 0 0 : Access CGRAM.(512Byte) 0 1 : Access DDRAM1. 1 0 : Access DDRAM2. 1 1 : Access both DDRAM1 and DDRAM2 concurrently 00 R/W 001 R/W Default Access Two Layers Character/Graphic LCD Controller 7 0 R/W 1-0 01 R/W RAiO TECHNOLOGY INC. 16/174 www.raio.com.tw RA8806 Preliminary Version 1.0 REG [20h] Active Window Right Register (AWRR) Bit 7-6 5-0 Description Reserved Active Window Right Position Segment-Right Note: AWRR must be equal or larger then AWLR, and less or equal then the value 27h (40 in decimal). Default 00 27h Access R R/W Two Layers Character/Graphic LCD Controller Note: REG[20h, 30h, 40h, and 50h] are used to dominate an active window for line/row changing when writing data. Users can use these four registers to set the left/right/top/bottom boundary of active window. When data goes beyond the right boundary of it, the cursor will automatically change the next line to write data. It will move to the left boundary of new line in active window. When the data comes to the right-bottom corner, the next write will cause the cursor to move to the left-top corner. REG [21h] Display Window Width Register (DWWR) Bit 7-6 Reserved Set Display Window Width Position 5-0 Segment-Width 27h R/W Segment-Right = (Segment Number / 8) - 1 If LCD panel resolution is 320x240, the value of the register is: ( 320 / 8 ) - 1 = 39 = 27h Note: REG[21h, 31h] are used to set Display Window Resolution. Users can set the viewing scope of Display Data RAM. Column width (DWWR) of RA8806 can be set between 0h ~ 27h, and Row height (DWHR) can be set between 0h ~ EFh. REG [30h] Active Window Bottom Register (AWBR) Bit 7-0 Description Default 00 Access R Description Active Window Bottom Position Common-Bottom Note: AWBR must be equal or larger then AWTR, and less or equal then the value EFh(239 in decimal) Default EFh Access R/W REG [31h] Display Window Height Register (DWHR) Bit Description Display Window Height Position Common- Height Common_ Height = LCD Common Number -1 7-0 If LCD panel resolution is 320x240, the value of the register is: 240 - 1 = 239 = EFh EFh R/W Default Access RAiO TECHNOLOGY INC. 17/174 www.raio.com.tw RA8806 Preliminary Version 1.0 REG [40h] Active Window Left Register (AWLR) Bit 7-6 5-0 Reserved Active Window Left Position Segment-Left Note: AWLR must be equal or less then AWRR, and less then the value 27h(39 in decimal) Description Default 00 00h Access R R/W Two Layers Character/Graphic LCD Controller REG [50h] Active Window Top Register (AWTR) Bit 7-0 Description Active Window Top Position Common-Top Note: AWTR must be equal or less then AWBR, and less then the value EFh (239 in decimal) Default 00h Access R/W REG [60h] Cursor Position X Register (CURX) Bit 7-6 Reserved Cursor Position of Segment / RAM0 Address[4:0] Define the cursor address of segment, a value from 0h ~ 27h(0 ~ 40 in decimal) When CGRAM write mode is selected (REG[12h] Bit[1:0] = 00b), the Bit[4:0] is the address for writing bit-map data. When create a full-size font, normally set to 0. When create an odd half-size font, normally set to 0, and set 10h for even font. Description Default 00 Access R 5-0 00h R/W REG [61h] Begin Segment Position Register of Scrolling (BGSG) Bit 7-6 Reserved Segment Start Position of Scrolling Mode 5-0 REG[61h] defines the start position (left boundary) of scroll window, it must be a value that less or equal to the REG[62h], which defines the end position(right boundary) of scroll window. Also it must be less then the value of 27h (40 in decimal), for the Display Data RAM limit. 00h R/W Description Default 00 Access R Note: REG[61h, 62h, 71h, 72h] dominate a named scroll window for scroll function. They must be set before the scroll function is enable. REG [62h] End Segment Position Register of Scrolling (EDSG) Bit 7-6 Reserved Segment End Position of Scrolling Mode 5-0 REG[62h] defines the end position(right boundary) of scroll window, it must be a value that larger or equal to the REG[61h], which defines the end position(left boundary) of scroll window. Also it must be less or equal then the value of 27h(40 in decimal), for the Display Data RAM limit. Description Default 00 Access R 00h R/W RAiO TECHNOLOGY INC. 18/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller REG [70h] Cursor Position Y Register (CURY) Bit Description Cursor Position of Common / RAM0 Address[8:5] Define the cursor address of common, a value from 0h ~ EFh(0 ~ 239 in decimal). When CGRAM write mode is selected (REG[12h] Bit[1:0] = 00b), the Bit[3:0] is indicate which font will be created. And Bit[7:4] are not available. Default Access 7-0 00h R/W REG [71h] Scrolling Action Range Begin Common Register (BGCM) Bit Description Common Start Position of Scrolling Mode REG[71h] defines the begin position(top boundary) of scroll window, it must be a value that less or equal to the REG[72h], which defines the end position(bottom boundary) of scroll window. Also it must be less then the value of EFh (239 in decimal), for the Display Data RAM limit. Default Access 7-0 00h R/W REG [72h] Scrolling Action Range END Common Register (EDCM) Bit Description Common Ending Position of Scrolling Mode REG[72h] defines the end position(bottom boundary) of scroll window, it must be a value that larger or equal to the REG[71h], which defines the end position(top boundary) of scroll window. Also it must be less or equal then the value of EFh (239 in decimal), for the Display Data RAM limit. Default Access 7-0 00h R/W REG [80h] Blink Time Register (BTMR) Bit Description Cursor Blink Time and Scroll Time Blinking Time = Bit[7:0] x (Frame width) 7-0 Frame width = 1/Frame Rate The Frame Rate is depends on the DWWR and DWHR and ITCR setting. Notes: 1. The Setting also determines the scroll moving speed. 2. The Frame width is the time that the controller scan whole panel, it depends on the system clock frequency, setting of display window, driver interface (4-bits/8-bits), Idle time (ITCR), and dual mode or gray scale mode, etc. 00h R/W Default Access RAiO TECHNOLOGY INC. 19/174 www.raio.com.tw RA8806 Preliminary Version 1.0 REG [90h] Idle Time Counter Register (ITCR) Bit Description Idle Time Setting, in count of system clock. The value can determine the scan time of each COM of the LCD. COM_PRD = ( COM_SCAN + ITCR) x XCK_PRD In which, COM_SCAN = (SEG_NO/LD_WIDTH) x (1 + EXT_MD) XCK_PRD = 1 / XCK COM_PRD: The finally scan period for each COM(Unit : ns). 7-0 COM_SCAN: The really scan time for each COM. XCK_PRD: One cycle time of XCK. XCK is depends on the system clock(CLK) and REG[01h] Bit[3:2]. If system clock is 8MHz, REG[01h] Bit[3:2] = 10b, then XCK_PRD = 250ns. SEG_NO: Segment number, i.e. 240x160 panel, SEG_NO = 240. EXT_MD: In extension mode1 or 2(REG[12h] Bit[6:4] = 111b or 110b), the EXT_MD = 1, otherwise EXT_MD = 0. LD_WIDTH: Driver data width. If LCD driver data bus is 4-bits then LD_WIDTH = 4. If LCD driver data bus is 8-bits then LD_WIDTH = 8. Please refer pin "DW" description of Section 4-3. REG [A0h] Key-Scan Control Register 1 (KSCR1) Bit 7 Description Key-Scan Enable Bit 1 : Enable. 0 : Disable. Key-Scan Matrix Selection 1 : 4x8 Matrix(KOUT[3:0] is used, KOUT[7:4] please keep floating) 0 : 8x8 Matrix(KOUT[7:0] is used) Key-Scan Data Sampling Times De-bounce times of scan frequency. 00:4 01:8 1 0 : 16 1 1 : 32 LNGKEY_EN : Long Time Key Function Enable LNGKEY_EN = 0 Long key function is disable. LNGKEY_EN = 1 Long key function is enable. Default 0 Access R/W 00h R/W Default Access Two Layers Character/Graphic LCD Controller 6 0 R/W 5-4 00 R/W 3 0 R/W RAiO TECHNOLOGY INC. 20/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller KF2-0: Key-Scan frequency. If system clock is 10MHz, then the related Key-Scan timing are as following: KF2 KF1 KF0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Key-Scan Key-Scan Pulse Width Cycle (4x8) (KOUT period) 16s 64s 32s 128s 64s 256s 128s 512s 256s 1.024ms 512s 2.048ms 1.024ms 4.096ms 2.048ms 8.192ms Key-Scan Cycle (8x8) 128s 256s 512s 1.024ms 2.048ms 4.096ms 8.192ms 16.384ms 000 R/W 2-0 REG [A1h] Key-Scan Controller Register 2(KSCR2) Bit 7 6-4 Description Key-Scan Wakeup Function Enable Bit 0: Key-Scan Wakeup function is disable. 1: KEY-SCAN Wakeup function is enable. Reserved Long Key Timing Adjustment 00 : About 0.625sec(for 8MHz Clock source) 01 : About 1.25sec(for 8MHz Clock source) 10 : About 1.875 sec(for 8MHz Clock source) 11 : About 2.5 sec(for 8MHz Clock source) Numbers of Key Hit. 00 : No key is pressed 01 : One key is pressed, read REG[A2h] for the key number. 10 : Two key is pressed, read REG[A2h ~ A3h] for the key number. 11 : Three key is pressed, read REG[A2h ~ A4h] for the key number. Default 0 000 Access R/W R 3-2 00 R/W 1-0 00 R REG [A2h ~ A4h] Key-Scan Data Register (KSDR0 ~ 2) Bit 7-0 Description Key Strobe Data The corresponding key number that is pressed. Please reference Section 6-5 "Key-Scan". Default 00h Access R REG [B0h] Memory Write Command Register (MWCR) Bit 7-0 Description Memory data write command from the cursor position. Note: Write memory data, user must write the MWCR command first, then write DATA cycle. Default NA Access R/W RAiO TECHNOLOGY INC. 21/174 www.raio.com.tw RA8806 Preliminary Version 1.0 REG [B1h] Memory Read Command Register (MRCR) Bit 7-0 Description Memory data read command from the cursor position. Note: Memory read cycle in text mode, the cursor move in same behavior like graphic mode. B1h will perform a pre-read function. So the cursor position will increase after the MRCR command is write. Default NA Access R/W Two Layers Character/Graphic LCD Controller REG [C0h] Touch Panel Control Register 1 (TPCR1) Bit 7 Description Touch Panel Enable Bit 1 : Enable. 0 : Disable. TP Sample Time Adjusting 000 : Wait 50s for ADC data ready. 001 : Wait 100s for ADC data ready. 010 : Wait 200s for ADC data ready. 011 : Wait 400s for ADC data ready. 100 : Wait 800s for ADC data ready. 101 : Wait 1.6ms for ADC data ready. 110 : Wait 3.2ms for ADC data ready. 111 : Wait 6.4ms for ADC data ready. Note: When touch panel detects the Touch event, to avoid the signal instability, the sampled time is delayed to wait the signal stable. Here time calculation is the example of system clock 10MHz. Touch Panel Wake-up Enable: 1 : Touch panel can wake-up the Sleep mode(At the condition that ADC is enabled). 0 : Disable the touch panel wake-up function ADC Clock Convert Speed 0 0 0 : CLK / 4 0 0 1 : CLK / 8 0 1 0 : CLK /16 0 1 1 : CLK / 32 1 0 0 : CLK / 64 1 0 1 : CLK / 128 1 1 0 : CLK / 256 1 1 1 : CLK / 512 The "CLK" means system clock. Default 0 Access R/W 6-4 000 R/W 3 0 R/W 2-0 000 R/W REG [C1h] Touch Panel X High Byte Data Register (TPXR) Bit 7-0 Description Touch Panel X Data Bit[9:2](Segment) Default 00h Access R REG [C2h] Touch Panel Y High Byte Data Register (TPYR) Bit 7-0 Description Touch Panel Y Data Bit[9:2] (Common) Default 00h Access R RAiO TECHNOLOGY INC. 22/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller REG [C3h] Touch Panel Segment/Common Low Byte Data Register (TPZR) Bit 7-4 3-2 1-0 Reserved Touch Panel Y Data Bit[1:0] (Common) Touch Panel X Data Bit[1:0] (Segment) Description Default 0000 00 00 Access R R R REG [C4h] Touch Panel Control Register 2 (TPCR2) Bit 7 6-2 TP Manual Mode Enable 1 : Using the manual mode. 0 : Auto mode. Reserved Mode selection for TP Manual Mode 00 : IDLE mode: ADC idles. 01 : Wait for TP event, touch panel event could cause the interrupt or be read from REG[0Fh] B3. 10 : Latch X data, in the phase, X Data can be latched in REG[C1h] and REG[C3h]. 11 : Latch Y data, in the phase, Y Data can be latched in REG[C2h] and REG[C3h]. Description Default 0 00h Access R/W R 1-0 00 R/W REG [D0h] PWM Control Register (PCR) Bit 7 Description PWM enable 1 : Enable 0 : Disable, PWM_OUT level depends on the REG[D0h] Bit-6. PWM Disable Level 0 : PWM_OUT is Normal L when PWM disable or Sleep mode. 1 : PWM_OUT is Normal H when PWM disable or Sleep mode. Reserved PWM Clock Source Divide Ratio 0000 b CLK / 1 0001 b CLK / 2 0010 b CLK / 4 0011 b CLK / 8 : : 1111 b CLK / 32768 The "CLK" means system clock. For example, CLK is 8MHz: 0000 b 0001 b : : 1111 b PWM clock source = 8MHz, PWM clock source = 4MHz, Default 0 Access R/W 6 5-4 0 00 R/W R 3-0 0000 R/W PWM clock source = 256Hz. RAiO TECHNOLOGY INC. 23/174 www.raio.com.tw RA8806 Preliminary Version 1.0 REG [D1h] PWM Duty Cycle Register (PDCR) Bit Description PWM Cycle Duty Selection Bit 00h 1 / 256 01h 2 / 256 High period 02h 3 / 256 High period : : FFh 256 / 256 High period Default Access Two Layers Character/Graphic LCD Controller 7-0 00h R/W REG [E0h] Pattern Data Register (PNTR) Bit Description Data Written to DDRAM(Display Data RAM) The pattern that will be filled to active window in memory clear function. When REG[F0h] Bit-3 is `1', the data in the REG[E0h] will be filled to the whole active window. Default Access 7-0 00h R/W REG [F0h] Font Control Register (FNCR) Bit Description ISO8859 Mode 0 : Disable. The contents of ASCII block 1 ~ 4 are show as Table C-1~ Table C-4 of Appendix B. 1 : Enable. The ASCII block 1 ~ 4 indicate the ISO8859-1 ~ 4 standard and show as Table C-5 ~ Table C-8 of Appendix C. Reserved Memory Clear Function Write Function 0 : No Action. 1 : Memory clear function active, fill the data of FNTR to Active window. When this bit is set to "1", RA8806 will automatically read PNTR data, and fill it to Active window (Range: [AWLR, AWTR] ~ [AWRR, AWBR]), after clear completed, this bit will be cleaned to "0". ASCII Mode Enable 1 : All input data will be decoded as ASCII (00h ~ FFh) 0 : In text mode (REG[00h] Bit-3), the RA8806 will check the first written byte data first. If less then 80h then it's treated as ASCII (Half-size). Or it's treated as a full-size text(GB, BIG5 or Usercreated font). ASCII Blocks Select 0 0 : Map to ASCII block 1. (Table C-1 and Table C-5 of Appendix C.) 0 1 : Map to ASCII block 2. (Table C-2 and Table C-6 of Appendix C.) 1 0 : Map to ASCII block 3. (Table C-3 and Table C-7 of Appendix C.) 1 1 : Map to ASCII block 4. (Table C-4 and Table C-8 of Appendix C.) Default Access 7 0 R/W 6-4 000 R 3 0 R/W 2 0 R/W 1-0 00 R/W RAiO TECHNOLOGY INC. 24/174 www.raio.com.tw RA8806 Preliminary Version 1.0 REG [F1h] Font Size Control Register (FVHT) Bit Description Set Character Horizontal Size 0 0 : One Time of normal font width. 0 1 : Two Times of normal font width. 1 0 : Three Times of normal font width. 1 1 : Four Times of normal font width. Set Character Vertical Size 0 0 : One Time of normal font height. 0 1 : Two Times of normal font height. 1 0 : Three Times of normal font height. 1 1 : Four Times of normal font height. Reserved Default Access Two Layers Character/Graphic LCD Controller 7-6 00 R/W 5-4 00 R/W 3-0 0000 R RAiO TECHNOLOGY INC. 25/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6. Function Description 6-1 MPU Interface 6-1-1 MPU Type The RA8806 support 8080 or 6800 compatible MPU interface. When the pin "MI" is pull low then the MPU interface is set to 8080 compatible. If "MI" pulls high then the MPU interface is defined as 6800 compatible. And the pin "DB" is used to select the 8080 MPU data bus is 4-bits or 8-bits. When "DB" is pulled low, then the data bus for data transition is 4-bits. If pin "DB" pull high, the data transition is 8-bits. The option of 4-bits or 8-bits data bus is for both 8080 and 6800 MPU. Of course, if used 4bits interface then the 8080 MPU has to take double time to communicate with RA8806. 8080 MPU A0 A1-A7 IORQ Decoder RS RA8806 ZCS1 CS2 MI D0-D3(D0 -D7) RD WR RES DATA0-3(DATA0-7) ZRD ZWR ZRST Figure 6-1 : 8080 (4/8-bits) MPU Interface 6800 MPU A0 A1 -A7 VMA Decoder RS RA8806 VDD ZCS1 CS2 MI D0-3(D0-D7) EN R/W RES DATA0-3(DATA0-7) EN ZRW ZRST Figure 6-2 : 6800 (4/8-bits) MPU Interface RAiO TECHNOLOGY INC. 26/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller tAH8 RS ZCS1 CS2 ZWR ZRD DATA (Write) tAS8 tCYC8 tCC8 tDS8 tDH8 DATA (Read) tACC8 tOH8 Figure 6-3 : 8080 MPU Interface Waveform Table 6-1 : 8080 MPU Interface Timing Symbol tCYC8 tCC8 tAS8 tAH8 tDS8 tDH8 tACC8 tOH8 Description Cycle time Strobe Pulse width Address setup time Address hold time Data setup time Data hold time Data output access time Data output hold time Rating Min. 2*tc 50 0 20 30 20 0 0 Max. ------20 10 Unit ns ns ns ns ns ns ns ns Condition tc = one system clock period RAiO TECHNOLOGY INC. 27/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RS ZRW ZCS1 CS2 EN DATA (Write) tAS6 tAH6 tCYC6 tCC6 tDS6 tDH6 DATA (Read) tACC6 tOH6 Figure 6-4 : 6800 MPU Interface Waveform Table 6-2 : 6800 MPU Interface Timing Symbol tCYC6 tCC6 tAS6 tAH6 tDS6 tDH6 tACC6 tOH6 Description Cycle time Strobe Pulse width Address setup time Address hold time Data setup time Data hold time Data output access time Data output hold time Rating Min. 2*tc 50 0 20 30 20 0 0 Max. ------20 10 Unit ns ns ns ns ns ns ns ns Condition tc is one system clock period: tc = 1/CLK RAiO TECHNOLOGY INC. 28/174 www.raio.com.tw RA8806 Preliminary Version 1.0 6-1-2 Command Write According to the Table 5-1, RA8806 accept 4 cycles through MPU interface. If users want to write command to RA8806, then a Command cycle has to execute first, and then execute a Data Write cycle. The "Command Write" means write function data to register. After these two cycles, the Data will write into the indicative Register. Please see the following Figure 6-5 (1). In Table 6-1 of Section 6-1-1, each command of RA8806 is take 2 cycles, and the minimum cycle time is 2*tc. So totally the minimum time of command write need 4*tc. See following Table 6-3. If the secondary cycle is a "Data Read", then user could read the register content. See the following Figure 6-5 (2). Note the Figure 6-5 to Figure 6-7 are use the 8080 MPU interface as examples. Two Layers Character/Graphic LCD Controller RS ZCS1 ZWR ZRD DATA[7:0] REG# DATA (1) Command Write (Write Data to Register) RS ZCS1 ZWR ZRD DATA[7:0] REG# (2) Read Data from Register DATA Figure 6-5 : Command Write and Register Read Cycle Table 6-3 : Command Access Time Table System Clock 4MHz 6 MHz 8 MHz 10 MHz 12 MHz Command Access Time 1s 667ns 500ns 400ns 333ns RAiO TECHNOLOGY INC. 29/174 www.raio.com.tw RA8806 Preliminary Version 1.0 6-1-3 Memory Write/Read When users want to write data to memory - DDRAM or CGRAM, then a special Command cycle has to execute first, the register have to assign to "B0h" on Data Bus. Then the following Data Write cycle will write data into memory. If users want to read data from memory, then the register has to assign to "B1h" on Data Bus in Command Write cycle. Please see the following Figure 6-6 (1) and (2). Two Layers Character/Graphic LCD Controller RS ZCS1 ZWR ZRD DATA[7:0] B0h DATA1 (1) Memory Write (Write Data to DDRAM) DATA2 DATAn RS ZCS1 ZWR ZRD DATA[7:0] B1h DATA1 (2) Memory Read (Read Data from DDRAM) DATA2 DATAn Figure 6-6 : Memory Write/Read Cycle 6-1-4 Status Read RA8806 provides a dedicate Status Read cycle to help users know the status of RA8806. Please refer to following Figure 6-7 and the beginning of Section 5-2 "Register Description". RS ZCS1 ZW R ZRD DATA [7:0] Status DATA Status Register Read Figure 6-7 : Status Read Cycle RAiO TECHNOLOGY INC. 30/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6-2 Driver Interface The main function of Driver Interface is to generate Frame (Pin "FR"), Latch Pulse (Pin "LP"), "YD" and Data Bus (LD[7:0]) for external LCD driver IC. RA8806 could both support 4-bits and 8-bits LCD driver interface. Pin "DW" is for LCD driver data bus selection. If "DW" pulls high then 8-bits LCD driver is used. If pull low then 4-bits LCD driver is used. Figure 6-8 is the LCD interface of RA8806. RA8806 YD FR LP ZDOFF XCK LD[7:0] FLM M LP LCD Driver Common Signals STN Dot Matrix LCD Panel /DISPOFF CP D[7:0] Segment Signals Figure 6-8 : The Interface of RA8806 and LCD Driver Figure 6-9 is the timing waveform of RA8806 and LCD Driver. Users could also refer to Section 4-4 "LCD Driver Interface" for LCD driver pin description. F o r 3 2 0 x 2 4 0 : T o ta l 2 4 0 L P fo r e a c h F ra m e FR YD LP XCK 1 st lin e FR YD LP XCK (D a ta ) LD Figure 6-9 : The Waveform of RA8806 and LCD Driver RAiO TECHNOLOGY INC. 31/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Figure 6-10 is the application diagram of RA8806. In this example, we use 80-channels LCD Drivers to process Common and Segment activity of 320x240 LCD Panel. RA8806 send FR, LP, YD, Data Bus(LD[3:0] and clock(XCK) signals to Segment/Common drivers. The Figure 6-11 is the example for 160x160 panel application. Figure 6-10 : Application Circuit Diagram for 320x240 Panel RAiO TECHNOLOGY INC. 32/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 160-channel (C om m on) E IO 1 MD S/C VD D V SS L/R D I0~D I7 E IO 2 FR LP D ISP O FF XC K Y 1~Y 16 0 160*160 D ot LC D P an el Y1~Y160 R A8806 YD FR LP ZD O FF XC K EIO2 LD [7:0] DISPOFF DI0~DI7 XCK FR (S egm ent) EIO1 S/C L/R MD LP 160-channel Figure 6-11 : Application Circuit Diagram for 160x160 Panel Table 6-4 is the RA8806 driver signals mapping to different driver ICs' pin names. Note, do not need add any capacitor on these for LCD driver signals. If add external capacitor on these pins to ground or VDD, then the maximum limitation is 30pF. Table 6-4 : Driver IC I/F Name vs. RA8806 RA8806 Driver I/F LP Driver IC I/F Name LP LOAD CL1 CP XCK SCP CL2 HSCP FLM YD FR FRAME CDATA FR LD[7:0] ZDOFF DF(M) D[7:0] /DISPOFF /D.OFF DISP Definition of Driver IC I/F Data Latch Clock Latch Pulse in one line Latch pulse of display data Data Latch Pulse Data Shift Clock Clock pulse for segment shift register Shift Clock Pulse for X-Drivers Data Shift Pulse Shift Clock Pulse Scan Start-up Signal First Line Marker Frame Pulse Frame start signal(First line mark of common signal) Synchronous Data Switch signal to convert LCD drive waveform into AC LCD Data Bus Display OFF Display OFF Display OFF RAiO TECHNOLOGY INC. 33/174 www.raio.com.tw RA8806 Preliminary Version 1.0 6-2-1 Display Resolution RA8806 support many different resolution of LCD panel. For different resolution of panel, RA8806 could change the setting of some registers like DWWR and DWHR to modify display window size. And use registers AWRR, AWBR, AWLR and AWTR to change the active window size. For example, if 320x240 LCD panel is used, then the related register setting is as following: DWWR = (320 / 8) - 1 = 39 = 27h DWHR = 240 - 1 = 239 = EFh The active window range is less than display window. So user has to care the rule as following: 1. AWRR AWLR DWWR 2. AWBR AWTR DWHR RA8806 supports a variety of LCD modules, the setting of register depnding on different resolution of LCD module is list at below table. Table 6-5 : Registers Setting for LCM Resolution Panel Resolution 160*80 160*128 160*160 240*64 240*128 240*160 320*240 Segment Common 160 160 160 240 240 240 320 80 128 160 64 128 160 240 REG[21h] DWWR 13h 13h 13h 1Dh 1Dh 1Dh 27h REG[31h] DWHR 4Fh 7Fh 9Fh 3Fh 7Fh 9Fh EFh Two Layers Character/Graphic LCD Controller 6-2-2 Display Window and Active Window The RA8806 provides two windows for real application -- Display Window and Active Window. The Display Window is the actual resolution of LCD panel. Active is a sub-window in Display Window. The boundary of cursor shift depends on the active window. The relative registers of the two windows are as the following table. Table 6-6 Reg. AWLR AWRR AWTR AWBR DWWR DWHR Bit_Num Bit [5:0] Bit [5:0] Bit [7:0] Bit [7:0] Bit [5:0] Bit [5:0] Description Define left boundary of the active window Define right boundary of the active window Define top boundary of the active window Define bottom boundary of the active window Define the width of the display window Define the height of the display window Reference REG[40h] REG[20h] REG[50h] REG[30h] REG[21h] REG[31h] RAiO TECHNOLOGY INC. 34/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller For RA8806, if LCD panel resolution is 320x240 pixels then the display window resolution is 320x240. We can create an active window in the display window like Figure 6-12. This figure show the display resolution is 320x240, and a 160x160 active window is on the upper-middle. The relative setting of the active window as following: LCD_CmdWrite ( 0x40 ); LCD_DataWrite ( 0x09 ); LCD_CmdWrite ( 0x20 ); LCD_DataWrite ( 0x1D ); LCD_CmdWrite ( 0x50 ); LCD_DataWrite ( 0x00 ); LCD_CmdWrite ( 0x30 ); LCD_DataWrite ( 0x9F ); LCD_CmdWrite ( 0x40 ); LCD_DataWrite ( 0x27 ); LCD_CmdWrite ( 0x40 ); LCD_DataWrite ( 0xEF ); // AWLR = 09h = 9 // AWRR = 1Dh = 29 // AWTR = 00h = 0 // AWBR = 9Fh = 159 // DWWR = 27h = 39 // DWHR = EFh = 239 160 - 1 ( 320 / 8 ) - 1 240 - 1 ( 80 / 8) - 1 ( 240 / 8 ) - 1 320 0 1 2 .......... 79 80 .............................. 239 240 ......... 319 0 1 2 : : : : : : : 159 160 : : : 239 80 Active Window 160 x 160 80 240 80 Display Window 320 x 240 Figure 6-12 : RA8806 Display Window and Active Window RAiO TECHNOLOGY INC. 35/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller For RA8806, if LCD resolution is 240x160 pixels then the display window resolution is 240x160. We can create an active window in the display window like Figure 6-13. This figure show the display resolution is 240x160, and a 120x120 active window is on the upper-left. The relative setting of the active window as following: LCD_CmdWrite ( 0x40 ); LCD_DataWrite ( 0x00 ); LCD_CmdWrite ( 0x20 ); LCD_DataWrite ( 0x0E ); LCD_CmdWrite ( 0x50 ); LCD_DataWrite ( 0x00 ); LCD_CmdWrite ( 0x30 ); LCD_DataWrite ( 0x77 ); LCD_CmdWrite ( 0x40 ); LCD_DataWrite ( 0x1D ); LCD_CmdWrite ( 0x40 ); LCD_DataWrite ( 0x9F ); // AWLR = 00h = 0 // AWRR = 0Eh = 14 // AWTR = 00h = 0 // AWBR = 77h = 119 // DWWR = 1Dh = 29 // DWHR = 9Fh = 159 120 - 1 ( 240 / 8 ) - 1 160 - 1 ( 120 / 8 ) - 1 240 0 1 2............................ 119 120........................... 239 0 1 2 : : : : : : : 119 120 : : : 159 Active Window 120 x 120 160 Display Window 240 x 160 Figure 6-13 : Display Window and Active Window RAiO TECHNOLOGY INC. 36/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6-2-3 Com/Seg Scan Direction RA8806 supports a special feature to reverse the Common and Segment signal. User could use this feature to change the direction of cursor and display data. If use text rotate function and set CDIR = 1, then use could show text in vertical display. Please refer to Section 6-10-4. Table 6-7 Reg. MISC Bit_Num Bit 1 Bit 0 Description Define the order of Segment signals. (SDIR) Define the order of Common signals. (CDIR) Reference REG[01h] SEG0 .............................................. SEG319 COM0 : Cursor Moving way : : : : : : : COM239 (1) SDIR = 0 SEG0 ........................................ SEG319 COM0 : Cursor Moving way : : : : : : : COM239 (2) SDIR = 1 Figure 6-14 : Example for Change Segment Direction 6-2-4 Idle Time Counter (ITCR) ITCR(REG[90h]) is used to determine the idle time during the LP peer-to-peer time. It has following meanings in function. 1. Adjusting the Frame Rate.(By extending the scan time of each COM) 2. Avoiding the generation of "Flicker". The "Flicker" is generated by the violation of LCD scan cycle and Memory write cycle. "Flicker" means the noise of the scan data at such violation. By setting the ITCR, user can write the display memory only at "Idle" time to eliminate the "Flicker". XCLK LP ITCR T_COM COM_SCAN Figure 6-15 : Idle Time Period RAiO TECHNOLOGY INC. 37/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RA8806 scan time of each COM line can be calculated by the formulas. COM_PRD = ((SEG_NO/LD_WIDTH) x (1 + EXT_MD)) ITCR ) x XCK_PRD In which the EXT_MD means extension mode is set or not, if REG[12h] Bit[6:4] = 110b/111b, EXT_MD = 1, or EXT_MD = 0. The "XCK_PRD" is one clock period of XCK. The XCK frequency is base on the system clock. It depends on the setting of Bit[3:2] of REG[MISC]. As to the Frame time and frame rate calculation. It would be: FRM_PRD = COM_PRD x COM# And FRM_Rate = 1 / FRM_PRD For example, when panel size is set to 320x240, system clock frequency is 8MHz, REG[MISC] Bit[3:2] = 10b, LCD driver data bus width is 4-bits, what the frame rate would be? The System Clock(CLK) is 8MHz, and REG[MISC] Bit[3:2] = 10b is 250ns. XCK_PRD = 1 / (CLK/2) = 1/4MHz = 250ns COM_PRD = ( 320 / 4 ITCR) x XCK_PRD = (80+ ITCR) x 250(ns) If the ITCR = A0h(160 in decimal): COM_PRD = (80+160) x 250ns = 240 x 250ns = 60s The COM number is 240, so the frame period is: FRM_PRD = 60s x 240 = 14.4 ms And the frame rate is: Frame Rate = 1 / 10.8ms = 69.4 Hz We can see the effect that the ITCR setting to the corresponding frame rate. So we can use it to adjust the frame rate. Please refer to Appendix B - the Table B-1 ~ Table B-3. In those tables, we show some Frame Rate setting for difference resolution, system clock. But note the display quality is also depends on the module design and the material of liquid crystal. Table 6-8 Reg. ITCR MISC Bit_Num Bit [7:0] Bit [3:2] Description Define the idle time during the LP peer-topeer time. Select the clock frequency of XCK. Reference REG[90h] REG[01h] XCK = CLK/2, so the XCK_PRD RAiO TECHNOLOGY INC. 38/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6-3 Display Data RAM (DDRAM) The RA8806 embedded two 9.6Kbyte Display Data RAMs - DDRAM1 and DDRAM2. It can use for two layers mono-display or one layer 4-gray-levels display. The maximum resolution of supporting LCD panel is 320Column x 240Row. There are two modes to write the DDRAM, text mode and graphics mode. It provides a flexible and easy way to make the display. 6-3-1 Display Layer and Display Mode Selection There are 4 possible displays way at 2 Modes combination. 1. Only show DDRAM1 or DDRAM2: One DDRAM data will show on the screen, and another one DDRAM can be standby or as a CGRAM to created special font or symbol by users. Please refer to Section 6-11 "User Defined Font" for detail description. 2. Two Layer Mode: In this mode, the screen will show the combination data of DDRAM1 and DDRAM2. There are 4 types combination that set by REG[12H] Bit[3:2]. DDRAM1 "OR" DDRAM2 DDRAM1 "XOR" DDRAM2 DDRAM1 "NOR" DDRAM2 DDRAM1 "AND" DDRAM2 For detail please refer to Section 6-10-1-5 "Two Layer Display". 3. 4-Gray-level Mode: In gray mode, each pixel consists with 2 continuous bits in both DDRAM. 4. Extension Mode: Two extension modes is support, and both DDRAM1 and DDRAM2 data will show on the screen. Horizontal extension mode (Max. resolution is 640 x 240 pixels). Vertical extension mode (Max. resolution is 320 x 480 pixels). 6-3-2 Access Memory Selection There are one 512Byte CGRAM and two 9.6KByte DDRAMs in RA8806. The 512Byte CGRAM is used to generate user-define font, and the two DDRAM are used to store the display data. One of both DDRAM can be also store special font or symbol, that when only one DDRAM is active on the screen. Which RAM is available for MPU access is depending on the REG[12h] Bit[1:0]. Please refer to Section 5-2 "Register Description". Table 6-9 Reg. Bit_Num Bit [6:4] MAMR Bit [3:2] Bit [1:0] Description Display Layer and Display Mode Selection Two Layer Mode Selection MPU Read/Write Memory Selection REG[12h] Reference RAiO TECHNOLOGY INC. 39/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6-4 Touch Panel RA8806 built in a 10-bit ADC and control circuits to connect with 4-wires resistance type touch panel. Resistive Touch Panel is composed of two layer extremely thin resistive panel, such as Figure 6-16. There is a small gap between these two-layer panels. When external force press a certain point, the two-layer resistive panels will be touched, which is short. Because the end points of two-layer have electrodes (XL, XR, YU, YD), such as Figure 6-17, a comparative location will be detected with some switches in coordination. YU Y Plate X Plate Electrode XL YD XR Figure 6-16Touch Panel VDD SW2 YU Resistor -Y XL SW0 Resistor -X YD SW3 GND XR SW1 VDD Figure 6-17 : Control Switch of Touch Panel Users only need to connect the touch panel signals -- XL, XR, YU, and YD to RA8806. It will continuously monitor the panel and wait for touch event. When the event is occurred, a divided voltage on panel caused by touch is sensed and transferred by ADC to determine the location. After the value of X-axis and Y-axis are transferred and stored in corresponding registers respectively, the touch panel controller will issue an interrupt to inform MPU to process it. RAiO TECHNOLOGY INC. 40/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller VDD RA8806 X1 X2 Y1 Y2 39Kohm Touch Panel XL XR YU YD 20pF x 4 Figure 6-18 : RA8806 Touch Panel Circuit RA8806 provides 2 modes (Auto and Manual) for touch panel application. Table 6-10 Operation mode Auto Event detection Interrupt Interrupt Manual Polling Description When touch event happens, Read the corresponding X, Y coordination. When touch event happens, Read the corresponding X, Y coordination. Polling the touch event, and read the corresponding X, Y coordination. RAiO TECHNOLOGY INC. 41/174 www.raio.com.tw RA8806 Preliminary Version 1.0 6-4-1 Auto Mode Auto mode is the easiest way to implement touch panel application. Please refer to the flow chart below. (1) Flowchart: Start Two Layers Character/Graphic LCD Controller Enable Touch Panel ( REG[C0h] B7 = 1 ) Set Auto Mode ( REG[C4h] B7 = 0 ) Enable TP INT Mask ( REG[0Fh] B4 = 1 ) Ext. INT Event ISR Check INT Status ( REG[0Fh] B0 = ? ) 1 Read X, Y-axis ( Read REG[C1h], REG[C2h], REG[C3h] ) 0 Other Functions Execute Function Clear TP INT Status ( REG[0Fh] B0 = 0 ) ISR Termination Figure 6-19 : Auto Mode Flowchart for Touch Screen Table 6-11 lists the used registers. Table 6-11 Reg. TPCR1 TPCR2 INTR TPXR TPYR TPZR Bit_Num Bit 7 Bit 7 Bit 4 Bit 0 Bit [7:0] Bit [7:0] Bit [3:2] Bit [1:0] Description EnableTouch Panel function "Auto-Mode" or "Manual Mode" selection bit Touch Panel Hardware Interrupt enable bit Touch event status bit Touch Panel SEG data MSB byte Touch Panel COM data MSB byte Touch panel COM data LSB 2bit Touch panel SEG data LSB 2bit Reference REG[C0h] REG[C4h] REG[0Fh] REG[C1h] REG[C2h] REG[C3h] RAiO TECHNOLOGY INC. 42/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller (2) Program Example: Unsigned char X1,X2,Y1,Y2; Touch_Panel_Enable ( ); TP_Auto_Enable ( ); TP_INT_Mask_Enable ( ); : : Execute other function : : Int EXT_INT_Service_Routine { LCD_CmdWrite ( INTR ); INT_Sta = LCD_DataRead ( ); // Set TPCR1 Bit 7 to 1 // Set TPCR2 Bit 7 to 0 // Set INTR Bit-4 to 1 // Jump to ISR when interrupt // ISR entry // Check INT status If ( INT_Sta & 0x01 ) // Check If TP interrupt { LCD_CmdWrite(TPXR); X1 = LCD_DataRead( ); // MSB of X LCD_CmdWrite(TPYR); Y1 = LCD_DataRead( ); // MSB of Y LCD_CmdWrite(TPZR); X2 = LCD_DataRead( ) & 0x03; // LSB two Bits of X LCD_CmdWrite(TPZR); Y2 = LCD_DataRead( ) & 0xC0; // Least two Bits of Y : : Execute corresponding function : : LCD_CmdWrite ( INTR ); // Clear Touch Panel status temp = LCD_DataRead ( ) & 0xfe; LCD_CmdWrite ( INTR ); LCD_DataWrite ( temp ); } Else if (INT_Sta & 0x02) // Check if Key-Scan interrupt { : : } Else if (INT_Sta & 0x04) // Check if Wakeup interrupt { : : } } RAiO TECHNOLOGY INC. 43/174 www.raio.com.tw RA8806 Preliminary Version 1.0 6-4-2 Manual Mode The " Manual Mode" means that the operation process from "Touch event checking function" to "input Latch X data Y data", the whole operation and setting process ( includes TPCR2[1:0]) and receiving data from XY coordinates are manual operated by programmer. The advantage of using Manual Mode is it allows programmer more flexible applications. In the condition that is over the range of RA8806 register setting, the user can still use the software method to control the TP function in a correct way. Touch Event can be detected from "Interrupt Mode" or "Polling Mode" that depend on the system configuration. The difference between the "Interrupt Mode" and "Polling Mode" are explained as following. 6-4-2-1 External Interrupt Mode Under the "Interrupt Mode" the touch event detecting way is almost the same as " Auto Mode". The major processes are list as follows: 1. Enable Touch Panel function. 2. Change mode to "Manual mode". 3. Set the switch to Wait for touch event , Set TPCR2[1:0] to 01b. 4. When interrupt asserts, check if TP interrupt. 5. If yes, change the switch to Latch X data, Set TPCR2[1:0] to 10b, wait for enough time to make the latch data stable and latched to TPXR and TPZR. 6. Change the switch toLatch Y data, Set TPCR2[1:0] to 11b, wait for enough time to make the latch data stable and latched to TPYR and TPZR. 7. Read X, Y data from TPXR, TPYR and TPZR, and clear the interrupt status. The registers for Interrupt Mode are explained as below: Table 6-12 Reg. TPCR1 TPCR2 INTR TPXR TPYR TPZR Bit_Num Bit 7 Bit 7 Bit [1:0] Bit 4 Bit 0 Bit [7:0] Bit [7:0] Bit [3:2] Bit [1:0] Description Enable Touch Panel function TP Manual mode enable Mode selection for TP manual mode Touch Panel Interrupt Mask Touch Panel Detect Status bit Touch Panel X Data Bit[9:2](Segment) Touch Panel X Data Bit[9:2](Common) Touch Panel Y Data Bit[1:0] (Common) Touch Panel Y Data Bit[1:0] (Segment) Reference REG[C0h] REG[C4h] REG[0Fh] REG[C1h] REG[C2h] REG[C3h] Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 44/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Please refer to the following flow chart and the setting examples for applying Interrupt Mode: (1) Flowchart: Start ISR Enable Touch Panel ( REG[C0h] B7 = 1 ) Set Manual Mode ( REG[C4h] B7 = 1 ) Enable TP INT Mask ( REG[0Fh] B4 = 1 ) Wait for TP event Mode ( REG[C4h][1:0] = 01 ) Check INT Status ( REG[0Fh] B0 = ? ) 1 Latch X Data ( REG[C4h][1:0] = 10 ) Latch Y Data ( REG[C4h][1:0] = 11 ) Read X, Y-axis 0 Ext. INT Event ( Read REG[C1h], REG[C2h], REG[C3h] ) Other Functions Execute Function Clear TP INT Status ( REG[0Fh] B0 = 0 ) ISR Termination Figure 6-20 : Manual Mode Flowchart for Touch Screen RAiO TECHNOLOGY INC. 45/174 www.raio.com.tw RA8806 Preliminary Version 1.0 (2) Program Example: Unsigned char X1,X2,Y1,Y2; Touch_Panel_Enable ( ); TP_Manual_Enable ( ); TP_INT_Mask_Enable ( ); Switch_Wait_TP_Event( ); : : Execute other function : : Int EXT_INT_Service_Routine { LCD_CmdWrite ( INTR ); INT_Sta = LCD_DataRead ( ); // Set TPCR1 Bit-7 to 1 // Set TPCR2 Bit 7 to 1 // Set INTR Bit-4 to 1 // Set TPCR2[1:0] to 01b // Jump to ISR when interrupt // ISR entry // Check INT status Two Layers Character/Graphic LCD Controller If ( INT_Sta & 0x01) // Check If TP interrupt { Switch_Latch_X_data( ); // Set TPCR2[1:0] to 10b Delay_Time( ); // Delay enough time for X data stable Switch_Latch_Y_data( ); // Set TPCR2[1:0] to 11b Delay_Time( ); // Delay enough time for Y data stable LCD_CmdWrite(TPXR); X1 = LCD_DataRead( ); // MSB of X LCD_CmdWrite(TPYR); Y1 = LCD_DataRead( ); // MSB of Y LCD_CmdWrite(TPZR); X2 = LCD_DataRead( ) & 0x03; // LSB two Bits of X LCD_CmdWrite(TPZR); Y2 = LCD_DataRead( ) & 0xC0; // LSB two Bits of Y : : Execute corresponding function : : LCD_CmdWrite ( INTR ); // Clear Touch Panel status temp = LCD_DataRead ( ) & 0xfe; LCD_CmdWrite ( INTR ); LCD_DataWrite ( temp ); } Else if (INT_Sta & 0x02) // Check if Key-Scan interrupt { : : } Else if (INT_Sta & 0x04) // Check if Wakeup interrupt { : : } } RAiO TECHNOLOGY INC. 46/174 www.raio.com.tw RA8806 Preliminary Version 1.0 6-4-2-2 Polling Mode Under the "Polling Mode", users need to decide and set the de-bounce time after the touch event, as well as the sampling time after latch by considering the real situation, thus more flexibilities for users apply this mode. The development procedures are explained as follows: 1. Enable Touch Panel function 2. Change mode to "Manual mode" 3. Set the switch toWait for Touch event, i.e., set TPCR2[1:0] to 01b. 4. Read Touch Panel Event status from status register, check if the "Touch event" happens. 5. When touch event happens, confirm the stability of it and set the switch to Latch X data, i.e., TPCR2[1:0] set to 10b, wait for enough time to make the latch data stable and latched to TPXR and TPZR 6. Set the switch toLatch Y data, i.e., TPCR2[1:0] set to 11b, wait for enough time to make the latch data stable and latched to TPYR and TPZR 7. Read X, Y data from TPXR, TPYR and TPZR, and clear the interrupt status The settings for manual interrupt mode are described in the following table: Table 6-13 Reg. TPCR1 TPCR2 Bit_Num Bit 7 Bit 7 Bit [1:0] INTR TPXR TPYR TPZR Bit 3 Bit 0 Bit [7:0] Bit [7:0] Bit [3:2] Bit [1:0] Description Enable Touch Panel function Select operation mode to Auto-mode or Manual-mode. The switch of ADC controller for manual mode Touch panel event(Only activate in TP Manual mode) Touch Panel Detect Status bit Touch Panel X Data Bit[9:2](Segment) Touch Panel Y Data Bit[9:2] (Common) Touch Panel Y Data Bit[1:0] (Common) Touch Panel X Data Bit[1:0] (Segment) Reference REG[C0h] REG[C4h] Two Layers Character/Graphic LCD Controller REG[0Fh] REG[C1h] REG[C2h] REG[C3h] Programmer can check the status of Touch Panel Event from the Bit-3 or Bit-0 of INTR, the difference between those two bits is : 1. The Bit-3 of INTR reflects the current Touch status. When Touch event occurs, the Bit-3 is 1. When there is no Touch event, Bit-3 will be 0 and read only. 2. The Bit-0 of INTR records the Touch status. When a Touch event occurs, the Bit-3 will be 1 and however it won't be clear automatically, it has to clear by programmer. It needs to be noted is that the REG[0Fh] Bit-3 is the direct output from ADC circuit, when touch panel is touched, the bit will respond with the event. When touch event is not stable, it needs to be de-bounced to check if it's legal. The bit is only active at "Manual mode". When setting RA8806 to "Auto-mode, the touch event will be automatically checked if it's legal or not. Only the legal touch event will cause the interrupt. RAiO TECHNOLOGY INC. 47/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Please refer to the flowchart and setting examples for applying above methods: (1) Flowchart: Start Enable Touch Panel ( REG[C0h] B7 = 1 ) Set Auto Mode ( REG[C4h] B7 = 1 ) Wait for TP event Mode ( REG[C4h][1:0] = 01 ) Delay enough time Latch Y Data ( REG[C4h][1:0] = 11 ) Delay enough time 0 Check TP Event ( REG[0Fh] B3 = ? ) 1 Check TP Event 100 times ? invalid Clear TP INT Status ( REG[0Fh] B0 = 0 ) Other Function valid Execute Function Read X, Y-axis ( Read REG[C1h], REG[C2h], REG[C3h] ) Latch X Data ( REG[C4h][1:0] = 10 ) Figure 6-21 : Polling Mode Flowchart for Touch Screen RAiO TECHNOLOGY INC. 48/174 www.raio.com.tw RA8806 Preliminary Version 1.0 (2) Program Example: Touch_Panel_Enable ( ); TP_Manual_Enable ( ); Switch_Wait_TP_Event( ); Touch_Sta_Valid = 0; LCD_CmdWrite ( INTR ); INT_Sta = LCD_DataRead ( ); // Set REG[C0h]. Bit-7 = 1 // Set REG[C4h]. Bit-7 = 1 // Set REG[C4h][1:0] = 01 // Initial Touch state Two Layers Character/Graphic LCD Controller If ( INT_Sta & 0x08 ) // Check INTR.Bit-3 { for ( count = 0 ; count < 100 ; count++ ) // Check 100 times { LCD_CmdWrite ( INTR ); INT_Sta = LCD_DataRead( ); if (INT_Sta == 0) // When no touch { Touch_Sta_Valid = 0; // Touch is invalid break; } if ( count == 99 ) // When count 100 times, touch is valid Touch_Sta_Valid = 1; } if (Touch_Sta_Valid ) { Switch_Latch_X_data( ); // Set REG[C4h][1:0] = 10 Delay_Time( ); // Delay enough time Switch_Latch_Y_data( ); // Set REG[C4h][1:0] = 11 Delay_Time( ); // Delay enough time LCD_CmdWrite(TPXR); X1 = LCD_DataRead( ); // Read high byte of X-axis LCD_CmdWrite(TPYR); Y1 = LCD_DataRead( ); // Read high byte of Y-axis LCD_CmdWrite(TPZR); X2 = LCD_DataRead( ) & 0x03; // Read Least two Bits of X-axis LCD_CmdWrite(TPZR); Y2 = LCD_DataRead( ) & 0xC0; // Read Least two Bits of Y-axis : Execute corresponding function : LCD_CmdWrite ( INTR ); // Clear REG[0Fh]. Bit-0 temp = LCD_DataRead ( ) & 0xfe; LCD_CmdWrite ( INTR ); LCD_DataWrite ( temp ); } } : Execute other function : : RAiO TECHNOLOGY INC. 49/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6-5 Key-Scan RA8806 features with Key-Scan circuit, and could be used as Keyboard function. It will help to integrate the system circuit that includes keyboard application. The below Figure 6-22 shows the basic application circuit of 8x8 Key-Pad. RA8806 already built-in pull-up resistors in the pins "KIN[7:0]". RA8806 KIN0 KIN1 KIN2 KIN3 KIN4 KIN5 KIN6 KIN7 KOUT0 KOUT1 KOUT2 KOUT3 KOUT4 KOUT5 KOUT6 KOUT7 Figure 6-22 : 8x8 Key-Pad Application The related Registers of Key-san function are KSCR, KSDR, and KSER. The RA8806 Key-Scan controller features are given below: 1. Support with 4x8 or 8x8 Key-Scan Matrix 2. Programmable setting of sampling times and scan frequency of Key-Scan 3. Adjustable long key-press Timing 4. Multi-Key is available ( maximum three keys at the same time) 5. Allows the function of " Key press to wake-up the system" Table 6-14 is the key code of mapping to key-pad matrix for normal press. The key code will be stored in REG[A2h] when key was pressed. If it was a long time press, then the key code is show as Table 6-15. Table 6-14 : Key Number Mapping Table (Normal Key) ROW # 0 0 1 2 3 COL # 4 5 6 7 1 2 3 4 5 6 7 00h 01h 02h 03h 04h 05h 06h 07h 10h 11h 12h 13h 14h 15h 16h 17h 20h 21h 22h 23h 24h 25h 26h 27h 30h 31h 32h 33h 34h 35h 36h 37h 40h 41h 42h 43h 44h 45h 46h 47h 50h 51h 52h 53h 54h 55h 56h 57h 60h 61h 62h 63h 64h 65h 66h 67h 70h 71h 72h 73h 74h 75h 76h 77h RAiO TECHNOLOGY INC. 50/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Table 6-15 : Key Number Mapping Table (Long Key) ROW # 0 0 1 2 3 COL # 4 5 6 7 1 2 3 4 5 6 7 80h 81h 82h 83h 84h 85h 86h 87h 90h 91h 92h 93h 94h 95h 96h 97h A0h A1h A2h A3h A4h A5h A6h A7h B0h B1h B2h B3h B4h B5h B6h B7h C0h C1h C2h C3h C4h C5h C6h C7h D0h D1h D2h D3h D4h D5h D6h D7h E0h E1h E2h E3h E4h E5h E6h E7h F0h F1h F2h F3h F4h F5h F6h F7h When the Multi-Key function is applied, the pressed keys will be saved in the system each with KSDR0, KSDR1 and KSDR2. Note that the priority of keys saving is determined on the value size of Key-code, not the orders of keys pressing, please refer to the following example: Press the Key-code in turn of 0x44, 0x00 and 0x22, press Multi-Key at the same time, the Key-code will be saved in KSDR: KSDR0 = 0x00 KSDR1 = 0x22 KSDR2 = 0x44 The definition of Key-code is described in the registers KSDR0 ~ 2 [A2h ~ A4h]. The basic features of above Key-Scan settings are introduced as follows: Table 6-16 Reg. Bit_Num Bit 7 Bit 6 KSCR1 Bit [5:4] Bit 3 Bit [2:0] KSCR2 KSDR0 KSDR1 KSDR2 INTR Bit 5 Bit 1 Key-Scan interrupt enable Key-Scan Interrupt Status bit REG[0Fh] Bit [7:0] Key code for pressed key REG[A2h ~ A4h] Bit [3:2] Bit [1:0] Description Key-Scan enable bit Key-Scan size selection Key-Scan sampling times setting Long key function enable Key-Scan scan frequency setting long key timing adjustment Pressed key number REG[A1h] REG[A0h] Reference RAiO TECHNOLOGY INC. 51/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Besides, in the Sleep Mode, RA8806 allows the "Wake-up on Keystroke" function, if any key is pressed, the System Clock starts to oscillate, and de-bounce to check if the wake-up event is legal. If legal then after two Frame time, the Display on the panel will be lighted, then system will recover from the Sleep Mode. If not legal, the system clock is off again and keeps on the Sleep mode. Please refer to the description of "Power Mode" for the detail introduction of "Sleep Mode". The settings for Wake-up function are explained as follows: Table 6-17 Reg. KSCR2 INTR Bit_Num Bit 7 Bit 6 Bit 2 Description Enable Key-Scan wake-up function Wake-up interrupt enable bit Wake-up Interrupt Status bit Reference REG[A1h] REG[0Fh] Enabling the Key-Scan functions, programmer cans uses following methods to check keystroke. 1) Software check method: to know the key be pressed from keeping check the status of Key-Scan (Bit-1 of INTR) 2) Hardware check method: to know the key be pressed from external interrupt signal Please be aware that the status of Key-Scan (Bit-1 of INTR) has been set to "1" no matter which method is used, programmer have to clear the status to 0 after reading the correct Key Code, otherwise the interrupt will be kept that no more interrupt is visible again. RAiO TECHNOLOGY INC. 52/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller The flowchart and sample settings for above applications are shown as follows: 1. Software Method: (1) Flowchart: Start Enable Key Scan( KS ) ( REG[A0h] B7 = 1 ) 0 Check KS Status ( REG[0Fh] B1 = ? ) 1 Read Key Code ( Read REG[A2h], REG[A3h], REG[A4h] ) Execute Function Clear KS Status ( REG[0Fh] B1 = 0 ) End Figure 6-23 : Key-Scan Flowchart(1) RAiO TECHNOLOGY INC. 53/174 www.raio.com.tw RA8806 Preliminary Version 1.0 (2) Program Example: Key-Scan_Enable ( ); // KSCR Bit-7 is set to 1 while (1) { LCD_CmdWrite ( INTR ); // Check Key-Scan status KS_Sta = LCD_DataRead ( ); KS_Sta = KS_Sta & 0x02; If ( KS_Sta ) { LCD_CmdWrite ( KSDR0 ); // Read first Key Code KeyCode1 = LCD_DataRead ( ); Switch ( KeyCode1 ) { case 0 : : : break; case 1 : : : } LCD_CmdWrite ( INTR ); temp = LCD_DataRead ( ); temp = temp & 0xfd; LCD_CmdWrite ( INTR ); LCD_DataWrite ( temp ); } } // Execute corresponding action Two Layers Character/Graphic LCD Controller // Clear Key-Scan status RAiO TECHNOLOGY INC. 54/174 www.raio.com.tw RA8806 Preliminary Version 1.0 2. Hardware Method: (1) Flowchart: Two Layers Character/Graphic LCD Controller Start Enable Key Scan ( KS ) ( REG[A0h] B7 = 1 ) Enable KS INT Mask ( REG[0Fh] B5 = 1 ) Ext. INT Event ISR Check KS Status ( REG[0Fh] B1 = ? ) 1 Read Key Code ( Read REG[A2h], REG[A3h], REG[A4h] ) 0 Other INT Function Other Functions Execute Function Clear KS Status ( REG[0Fh] B0 = 0 ) ISR Termination Figure 6-24 : Key-Scan Flowchart(2) RAiO TECHNOLOGY INC. 55/174 www.raio.com.tw RA8806 Preliminary Version 1.0 (2) Program Example: Key-Scan_Enable ( ); Key-Scan_INT_Mask_Enable ( ); : : Execute other functions : : Int EXT_INT_Service_Routine { LCD_CmdWrite ( INTR ); INT_Sta = LCD_DataRead ( ); If ( INT_Sta & 0x02 ) { LCD_CmdWrite ( KSDR0 ); KeyCode1 = LCD_DataRead ( ); Switch ( KeyCode1 ) { case 0 : : : break; case 1 : : : } LCD_CmdWrite ( INTR ); temp = LCD_DataRead ( ); temp = temp & 0xfd; LCD_CmdWrite ( INTR ); LCD_DataWrite ( temp ); } else if (INT_Sta & 0x01) { : : } else if (INT_Sta & 0x04) { : : } } // Set Reg. KSCR1 Bit-7=1 // Set Reg. INTR Bit-5=1 // Jump to ISR when external interrupt Two Layers Character/Graphic LCD Controller // ISR entry // Check INT status // Check if Key-Scan interrupt // Read Key Code // Execute keystroke function // Clear Key-Scan status // Check if Touch Panel interrupt // Check if Wakeup interrupt RAiO TECHNOLOGY INC. 56/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6-6 Clock and Reset RA8806 supports internal or external clock source without extra select pin. 6-6-1 OSC Circuit RA8806 contains a built-in OSC circuits. It generates corresponding clock by connecting an external 4M ~ 12MHz crystal between XG and XD pins. Figure 6-25 is the clock circuit for X'tal oscillator and external clock. RA8806 RA8806 XG 15pF X'tal 15pF (4~12MHz) XD CLK (4~12MHz) XG XD Figure 6-25: Clock Circuit 6-6-2 External Clock RA8806 can also accept external clock for system clock source. The external clock source can directly connect to XG pin, and XD pin must be kept floating. tRCL tFCL EXT0 tWH tWL tC Figure 6-26 : External Clock Table 6-18 : Clock Timing Signal Symbol tRCL tFCL EXT 0 tWH tWL tC Parameter External clock rise time External clock fall time External clock HIGH-level pulse width External clock LOW-level pulse width External clock period VDD = 5V Min. Max. -- 10 -- 10 VDD = 3.3V Min. Max. -- 10 -- 10 Unit ns ns ns ns ns Ta = -20 to 75 Condition Note 1. Note 2. Note 1. Note 2. Note 1. Note 2. Note 1. Note 2. 66.6 -- 83.3 -- Notes: 1. ( t C - t RCL - t FCL ) x 2. ( t C - t RCL 475 < t WH , t WL 1000 525 - t FCL ) x > t WH , t WL 1000 RAiO TECHNOLOGY INC. 57/174 www.raio.com.tw RA8806 Preliminary Version 1.0 6-6-3 Reset The RA8806 requires a reset pulse at least 1024*tc long after power-on in order to re-initialize its internal state. If the oscillator frequency is 6Mhz, then the Reset pulse is at least 170.7s. For maximum reliability, it is not recommended to apply a DC voltage to the LCD panel while the RA8806 is reset. Turn off the LCD power supplies for at least one frame period after the start of the reset pulse. Two Layers Character/Graphic LCD Controller RA8806 VDD RA8806 100K From MCU ZRST 1uF 0.1uF (1) SW (Option) ZRST (2) Figure 6-27: Examples of ZRST Pin Figure 6-27 is an example for ZRST application circuit. It could be controlled by MPU such as (1) of Figure 6-27. Or, generated by a RC circuit such as (2) of Figure 6-27. The RA8806 cannot receive commands while it is reset. Commands to initialize the internal registers should be issued soon after a reset. During reset, the LCD drive signals XD, LP and FR are halted. A delay of 1ms (minimum) is required following the rising edges of both ZRST and VDD to allow for system stabilization. Please refer to Figure 6-28 for more detail description. t RS 0.8VDD VDD t RH Reset Complete ZRST 0.8VDD 0.2VDD Max. tRS tRH tRST Reset setup time Reset hold time Reset active time ---Typ. ---Min. 1 1 1024 Unit ms ms t RST t c (*) *t C is the period of system clock, for example: 10MHz, t C = 100ns Figure 6-28: Reset Timing RAiO TECHNOLOGY INC. 58/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6-7 Power 6-7-1 Power Architecture The power architecture of RA8806 is shown as Figure 6-29. VDDP, GNDP are I/O powers and AVDD, AGND are analog powers for internal ADC. There is an embedded 5V-to-3V DC/DC Converter which is without any external controlled pin. The application circuits of 5V and 3V system will be described below. RA8806 VDDP Core GNDP VDD VDDH AVDD 5V 3V GND AGND ADC Figure 6-29: Power Architecture 6-7-2 3V Application Circuit When RA8806 operates in 3V system, the power consumption will be smaller. The Figure 6-30 is the example for 3V system. Users need to connect 3V power to VDDP, VDD and AVDD respectively. The DC/DC Converter is not used, so VDDH needs to be kept floating. 3.3V MCU VDD 3.3V RA8806 VDDP 0.47uH VDD VDDH AVDD GNDP 0.1u 0.1u 0.1u (Option) 0.47uH (Option) 10u GND AGND GND I/O MCU I/F Figure 6-30: The Power Connection of 3V RAiO TECHNOLOGY INC. 59/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6-7-3 5V Application Circuit When RA8806 operates in 5V system, 5V power inputs from VDDH and 3V power will output at VDD that is the power to supply internal core. Users need to add 1F and 0.1F capacitors in parallel at VDD to increase power stability. Please note that DC-to-DC converter will increase some power consumption. So, if the RA8806 enter Sleep mode then it will keep around 20A static current. 5V MCU VDD 5V RA8806 VDDP ~3V VDD VDDH 0.47uH (Option) AVDD GNDP GND AGND 10u 0.1u 1u 0.1u 0.1u GND I/O MCU I/F Figure 6-31 : The Power Connection of 5V RAiO TECHNOLOGY INC. 60/174 www.raio.com.tw RA8806 Preliminary Version 1.0 6-7-4 Sleep Mode The RA8806 provide two operation modes: Normal mode and Sleep mode. Please refer to Chapter 5 "Register Description" for Register WLCR explanation. RA8806 will shut down the system clock, to achieve the minimum power consumption. When RA8806 is under the Sleep mode, only the status register can be read, other registers are not allowed to read. Other command besides REG[00h] Bit7(Sleep mode) can't be written. When RA8806 is under Sleep Mode, it can accept the following three methods to wake-up. 1. Write REG[00h] Bit-7 = 0, then it will return to Normal Mode. 2. Touch event is detected. 3. Key-Scan is detected. When RA8806 quit from Sleep mode, to avoid the incorrect activity, RA8806 must de-bounce the wake-up event for enough time(about 1,000 system clock periods) to make sure it, then quit from Sleep mode. Besides, when MPU program RA8806 to enter Sleep mode, RA8806 can't receive command from MPU anymore till quit the Sleep mode. The command will be lost. User program must avoid the possibility of the condition. For example, if RA8806 be programmed to Sleep mode, at the same time, the MPU receives an external interrupt, and cause the MPU enter the Interrupt Service Routine(ISR). That will cause RA8806 can't correctly receive and recognize the command. From the view of hardware design, the condition can't be prevented. Because the external interrupt is an individual mechanism of MPU. We can't predicate the happen of it from the role of RA8806. It's a possible risk even the possibility is rare. So it's suggested that MPU must be mask the interrupt for RA8806 before commanding the RA8806 to enter the Sleep mode. The interrupt mask is off after RA8806 quit from Sleep mode. Besides, because the status register can be read normally at Sleep mode. Also user can check the status in the ISR for judgment. If RA8806 is checked under Sleep mode, MPU can quit ISR and execute nothing to prevent incorrect activity. Table 6-19 Reg. WLCR Bit_Num Bit 7 Description Normal mode and Sleep mode selection. Reference REG[00h] Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 61/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6-8 Interrupt and Busy The RA8806 provides an interrupt output (INT) for MPU to indicate the status of RA8806. And a busy output to indicate the RA8806 is in busy state. Both signals could be set to active high or active low by register. 6-8-1 Interrupt RA8806 provides an Interrupt signal (INT) for following event: Touch Panel touched event is happen. Key-Scan enable and key is pressed Wake-up event occurs when Sleep mode. These interrupt events can be masked or active respectively. It is controlled by the REG[0Fh], the mask and status registers. Besides, RA8806 also provide a software access interrupt function. When user system don't support hardware interrupt signal, they can use polling method to achieve the software interrupt. To access hardware interrupt, user needs to set corresponding Interrupt Mask bit to 1(Refer to register INTR). The steps are: RA8806 generate the interrupt signal to MPU. After finishing the current instruction, MPU hardware will jump the PC(Program counter) to Interrupt Service Routine(ISR). In the same time that RA8806 generate the interrupt, the interrupt status is set to "1"(REG[0Fh] Bit[2:0]). (For example, if key-scan interrupt activates, the Key-Scan status will be set to 1). To apply the software interrupt method, users don't need extra setting. Just reading the status bit of register INTR to check the interrupt event. BTW, interrupt mask can only disable the hardware interrupt, but can't disable the status of INTR. Example-1: The Figure 6-32 is an example of INT timing for Wake-up event. RA8806 provides three wake-up event. Please refer to Section 6-7-4 "Sleep Mode" for the detail. t INTST Wake-Up Event INT Figure 6-32: Interrupt Timing(1) RAiO TECHNOLOGY INC. 62/174 www.raio.com.tw RA8806 Preliminary Version 1.0 t INTST = Clock Stable Time + 1024*t C If user use a 6MHz X'tal for system clock, the Clock Stable Time is about 3~3.5ms and t C is 167ns. Example-2: The Figure 6-33 is an example of INT timing for Key-Scan event. Two Layers Character/Graphic LCD Controller t INTST Key-Scan Event INT Figure 6-33 : Interrupt Timing(2) t INTST = De-bounce Time + t CKEY The "De-bounce Time" is set by REG[A0h] Bit[5:4], and the tCKEY is the Key-Scan Cycle that depends on the setting of REG[A0h] Bit[2:0]. Additionally, because the status bit will not be cleared to 0 automatically. So user must manually clear it after processing the interrupt routine. 6-8-2 Busy The RA8806 also provides a "BUSY" signal. When Busy Flag is "1", which means RA8806 is in busy state that RA8806 couldn't access data from DDRAM. Two busy conditions are provided. One is Scan Busy and another is Memory Write Busy. The detail explains is as follows. Scan Busy: When LCD panel displays, RA8806 scan circuit will access the DDRAM. If another DDRAM access cycle happens. It will cause the data lose in one of them. So when scan circuit is active, it causes a busy condition, called Scan Busy. Figure 6-34 shows the data flow diagram of scan circuit and MPU memory access cycle. Figure 6-35 is same as Figure 6-15 to show RA8806 scan waveform. It describes the condition that RA8806 scan the display for each COM line. The COM scan time is combined with an Idle time and a Scan time. The Idle time period can be set by register ITCR. The Scan period is the time of Scan Busy. Also accessing data at Scan Busy time will cause the scan data lose. But it will not cause a fatal error. The scan data lose will cause the display defect. But if it's not too frequent, the defect will not infect the display too much. RAiO TECHNOLOGY INC. 63/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RA8806 Display Data RAM Memory-Write Interface Controller LCD-Scan LCD Driver MCU Figure 6-34 : Data Flow of DDRAM XCLK LP ITCR T_COM COM_SCAN Figure 6-35 : Scan for Each COM line Memory Write Busy: Following two conditions will cause the Memory write busy: 1. When MPU write data in text-mode. Depending on different size of font, it needs an enough time to write the font to DDRAM. At the period, RA8806 can't access the DDRAM again, it's a memory write busy condition. 2. When MPU program RA8806 as a memory clear function(FNCR Bit-3 = 1). The period of clear DDRAM also cause a memory write busy. It will cause the DDRAM lost when accessing DDRAM in the period of Memory Write Busy. So user must check the busy status after the upper two conditions is done. Besides, RA8806 provide polarity setting for "BUSY" and interrupt "INT" pin. (Please refer to register MISC) Normally, this "BUSY" pin is connected to MPU I/O input, and then MPU have to monitor this pin before accessing RA8806. The following is the timing of BUSY pin. The BUSY can be active high or low that depend on the setting of REG[01h] Bit-5. RAiO TECHNOLOGY INC. 64/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RS, ZCS1 t BST ZWR DATA[7:0] (Write) BUSY t BUSY Figure 6-36 : BUSY Timing Chart Table 6-20 : Busy Timing Signal Symbol Parameter Half Size Font Full Size Font Half Size Font t BUSY Busy Active Time Full Size Font -100*t c ns Rating Min 150 250 -50*t c ns Max -Unit ns Condition System Clock: 8MHz VDD: 5V t c = 125ns t BST BUSY Busy Setup Time RAiO TECHNOLOGY INC. 65/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6-9 PWM RA8806 provide a set of programmable PWM (Pulse Width Modulation) for LCD contrast adjustment. The PWM frequency and duty can be set by register. And the driving capability of PWM output pin is larger than other output pin, about 4 multiples of normal output. Besides, if the PWM function is disable, it can use as normal IO signal. The relative function setting please refers to the table below. Table 6-21 Reg. PCR PDCR Bit_Num Bit 7 Bit [3:0] Bit [7:0] Description PWM function enable Clock source divide ratio select PWM Duty Cycle Select Reference REG[D0h] REG[D1h] The following are two examples for the PWM output (pin "PWM_OUT"): TH TPWM TL Example-1: System Clock = 10Mhz, Register PCR Bit[3:0] = 0001b Clock Source = 10MHz/2 = 5MHz TPWM = 256*(1/5MHz) = 51.2s Register PDCR Bit[7:0] = 0Fh TH = 16*(1/5MHz) = 3.2s TL = (256-16) * (1/ 5MHz) = 48s TPWM TH TL Example-2: System Clock = 10Mhz, Register PCR Bit[3:0] = 0010b Clock Source = 10MHz/4 = 2.5MHz TPWM = 256*(1/2.5MHz) = 102.4 s Register PDCR Bit[7:0] = 7Fh TH = 128*(1/2.5MHz) = 51.2s TL = (256-128) * (1/ 2.5MHz) = 51.2s Figure 6-37 : PWM_OUT Pulse RAiO TECHNOLOGY INC. 66/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Figure 6-38 shows the reference circuit of PWM contrast application for positive VLCD voltage. Figure 6-39 shows the reference circuit for negative VLCD voltage. Figure 6-38 : PWM Reference Circuit for Positive VLCD RAiO TECHNOLOGY INC. 67/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Figure 6-39 : PWM Reference Circuit for Negative VLCD RAiO TECHNOLOGY INC. 68/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6-10 Display Function 6-10-1 Character/Graphic Mode There are two modes for MPU to write data to RA8806, i.e., character mode and graphic mode. In graphic mode, data is written directly to DDRAM in bit-map format. In character mode, data is written in code format, the font bit-map in the CGROM will be written to DDRAM by this way. RA8806 stores two different sizes of characters in its font ROM - 1) half size font(8x16 pixels), 2) full size font(16x16). Figure 6-40 shows the examples. 16X16 font 8X16 font Figure 6-40 : Full Size and Half Size Font 6-10-1-1 Graphic Display The RA8806 graphics mode is use bit map to fill the data on the DDRAM. The Figure 6-41 is an example to show how to set graphics mode. 1. Setup Register WLCR, TEXT_MD = 0 2. Write bit map to Display Data Memory directly. Figure 6-41 : Graphics Mode The RA8806 support maximum resolution is 320x240 pixels, therefore it need 9.6Kbyte(320x240/8 = 9600) Display Data RAM(DDRAM) to store each pixel data. Figure 6-42 is an example to show the DDRAM data mapping to the LCD panel. RAiO TECHNOLOGY INC. 69/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Segment D7 D6 D5 D4 D3 D2 D1 D0 0 1 2 3 4 5 6 7 ..... 11 10 01 1 0 Display Data RAM Display On LCD Figure 6-42 : The Mapping of Display Data to LCD Panel The RA8806 provide an Auto-Write feature to fill a data to all of the DDRAM. At first, user writes the data to Register PNTR then initials the Auto-Write function(Register FNCR Bit-3). RA8806 will fill the data to DDRAM in very short time. Normally this feature is used to clear screen or want to fill fixed pattern or background on screen. Table 6-22 Reg. WLCR Bit_Num Bit 3 Description Text Mode Selection Reference REG[00h] 6-10-1-2 Half Size Font RA8806 built in 4 half-size font blocks, each block contains 0h ~ FFh(256) characters, and could be selected by register REG[F0h] Bit[1:0]. By setting the REG[F0h] Bit[1:0], the corresponding table is selected. About the font table, please reference Appendix C. The RA8806 also supports ISO8859 standard (ISO - International Organization for Standardization). Which can fully supports most Latin characters set. REG[F0h] Bit-7 is the option of RA8806 default coding or ISO8859 mode. In this mode, RA8806 internal ASCII table1 ~ 4 is mapping to the coding of ISO8859-1 ~ ISO8859-4. Table 6-23 Reg. FNCR Bit_Num Bit 7 Bit 2 Bit [1:0] Description ISO8859 mode ASCII Mode Enable ASCII Blocks Select REG[F0h] Reference RAiO TECHNOLOGY INC. 70/174 www.raio.com.tw RA8806 Preliminary Version 1.0 6-10-1-3 Full Size Font There are two types of CGROM in RA8806, i.e. RA8806-S and RA8806-T. RA8806-S contains the Simplified Chinese characters with the coding of GB standard. RA8806-T contains the Traditional Chinese characters with the coding of BIG5 standard. About the detail, please refer the Appendix D and Appendix E Table 6-24 Reg. WLCR Bit_Num Bit 3 Description Text Mode Selection Reference REG[00h] Two Layers Character/Graphic LCD Controller 6-10-1-4 Bold and Inverse The RA8806 supports the bold and inverse font. The user only needs to set up the related register bit that before send the character code to RA8806. Figure 6-43 shows the examples. 16X16 inverse font 8X16 inverse font 16X16 bold font 8X16 bold font Figure 6-43 : Inverse and Bold Font Example. Table 6-25 Reg. Bit_Num Bit 3 WLCR Bit 2 Bit 1 Bit 0 WCCR Bit 4 Description Text Mode Selection Set Display On/Off Selection Blink Mode Selection Inverse Mode Selection Bold Font (Character Mode Only) REG[10h] REG[00h] Reference RAiO TECHNOLOGY INC. 71/174 www.raio.com.tw RA8806 Preliminary Version 1.0 6-10-1-5 Two Layer Display The RA8806 embedded two DDRAM for two layers display. The register MAMR is used to show the visible display for DDRAM1 and DDRAM2. It provides six display modes: Display DDRAM1 Display DDRAM2 Display DDRAM1 OR DDRAM2 Display DDRAM1 XOR DDRAM2 Display DDRAM1 NOR DDRAM2 Display DDRAM1 AND DDRAM2 Please refer Figure 6-44 and Register description of MAMR Bit[6:4] and Bit[3:2]. Two Layers Character/Graphic LCD Controller DDRAM1 1 DDRAM2 Visible Display Controller OR Controller 2 Controller NOR Controller 3 Controller XOR Controller 4 Controller AND roller Figure 6-44 : Two Layers Display Table 6-26 Reg. MAMR Bit_Num Bit [6:4] Bit [3:2] Description Display Layer Selection Two Layer Mode Selection Reference REG[12h] RAiO TECHNOLOGY INC. 72/174 www.raio.com.tw RA8806 Preliminary Version 1.0 6-10-1-6 Line Gap Two Layers Character/Graphic LCD Controller The RA8806 provide Line Gap feature. Especially in Chinese display, if add some space in each line will look better. The range of line gap is 1 ~ 16 pixel. Once the line gap is setup, the cursor will automatically move to property position for each line. Setting the low nibble of the register CHWI, user can adjust the line gap. To deserve to be mentioned, when RA8806 operating in 90 degree mode, the line gap is either 0 pixel or 8 pixels, no matter what the font size. The selection of two conditions is according to Bit-3 of the register CHWI. Table 6-27 Reg. CHWI Bit_Num Bit [7:4] Bit [3:2] Description Set Cursor Height Set Line Gap Reference REG[11h] 6-10-2 Gray Scale Display The RA8806 also provide 4-gray-scale display implemented by FRC method. In gray level display mode, RA8806 combines the data of DDRAM1 and DDRAM2 as a gray picture. Each gray pixel occupies 2 bits of DDRAM data for display. Data [00b] indicate an empty pixel display and [11b] is solid display. [01b] & [10b] will be time sharing as 1/3 and 2/3 lightness. Please refer to Figure 6-45. 76543210 76543210 3a 3b 2a 2b 1a 1b 0a 0b 3a 3b 2a 2b 1a 1b 0a 0b 7a 7b 6a 6b 5a 5b 4a 4b 7a 7b 6a 6b 5a 5b 4a 4b DDRAM2 DDRAM1 Gray-Scale Display Bit-a 0 0 1 1 Bit-b 0 1 0 1 Gray-Level 1 2 3 4 DDRAM1: Display Data RAM #1 DDRAM2: Display Data RAM #2 In Gray-Scale mode, both DDRAM are used. Figure 6-45 : Mapping Rule of 4-Gray-Scale Display According to the data write order, RA8806 support 2 data input methodology for Gray-Scale display. User can write the data as the same way of mono graphic display. 1. Horizontal moving first then Vertical, refer Figure 6-46. 2. Vertical moving first then Horizontal, refer Figure 6-47. RAiO TECHNOLOGY INC. 73/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Horizontal-Write (Panel Resolution: 320 x 240) 1st byte 41th byte 81th byte 2nd byte 42th byte 82th byte 3rd byte 43th byte 83th byte 40th byte 80th byte 120th byte N+1th byte N+2th byte N+3th byte N+40th byte Figure 6-46 : Horizontal Write Vertical-Write (Panel Resolution: 320 x 240) 1st byte 2th byte 3rd byte 241nd byte 242th byte 243th byte Nth byte N+1th byte N+2th byte 240th byte 480th byte N+240th byte Figure 6-47 : Vertical Write About the register setting, please refer to following register: Table 6-28 Reg. MAMR Bit_Num Bit 7 Bit [6:4] Description Cursor Auto Shifting Direction Gray Mode selection Reference REG[12h] RAiO TECHNOLOGY INC. 74/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller The picture below is an example of 4-gray-level picture, the program example are attached below it: Figure 6-48 : 4-Gray-Scale Example Program Example: LCD_Graphic(); Gray_Mode(); Scan_Diret_H_V(); LCD_GotoXY( 0 , 0 ); LCD_CmdWrite( 0xB0 ); for ( i = 0 ; I < 4800 ; i++ ) { LCD_DataWrite( 0x00 ) ; } for ( i = 0 ; I < 4800 ; i++ ) { LCD_DataWrite( 0x55 ) ; } for ( i = 0 ; I < 4800 ; i++ ) { LCD_DataWrite( 0xAA ) ; } for ( i = 0 ; I < 4800 ; i++ ) { LCD_DataWrite( 0xFF ) ; } // Set graphic mode // Set REG[12h] Bit[6:4] to 000b, as gray level display // Set REG[12h] Bit-7 to 0, Cursor moves from left to right // Write memory command // Write data // Gray Level 1 ( 00 ) // Gray Level 2 ( 01 ) // Gray Level 3 ( 10 ) // Gray Level 4 ( 11 ) RAiO TECHNOLOGY INC. 75/174 www.raio.com.tw RA8806 Preliminary Version 1.0 6-10-3 Font Size Adjustment and Font Write-Time RA8806 supports Font size adjustment. There are two types of characters stored in RA8806 font ROM - Half size (8x16 pixels) and full size (16x16 pixels) characters. The" Font size adjustment" function supports the font enlargement from 1 to 4 times bigger in vertical and horizontal respective directions. Programmer can adjust the character size from setting FVHT[7:4] : Table 6-29 Reg. FVHT Bit_Num Bit [7:6] Bit [5:4] Description Horizontal width adjustment for character Vertical width adjustment for character Reference REG[F1h] Two Layers Character/Graphic LCD Controller Figure 6-49 shows the example of character enlargement: 2x1 enlarged 8x16 font 1x2 enlarged 16x16 font Figure 6-49 : Font Size Adjustment Additionally, the Font Sized Adjustment is not only available for the character display mode, but also for the following display modes: For displaying the user created fonts 90 font and display rotation RAiO TECHNOLOGY INC. 76/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller After writing completed font code(One bye for half size font and two bytes for full-size font), it will takes an enough time for data to be written into the DDRAM. In the mean while no data can be read or wrote into DDRAM. (Please refer to Section 6-8 "Interrupt and Busy", the description of "Memory Write Busy"). The writing time is differing from the enlargement multiplier of font size. Its calculation formula is as follows : Tfw = ( 16*tc + 32*tc x ( HW x VH ) ) x ( 1 + 10% ) Tfw : Font Write time tc : System clock period HW : Horizontal enlargement multiplier. VH : Vertical enlargement multiplier. Here 10% is for the flexible error consideration. Please refer to the following examples: (Estimate the system clock is 4MHz and the tc is 250ns) Table 6-30 : Delay Time for Font Enlargement Font enlargement multiplier Standard delay time(S) Suggested delay time(S) 1x1 2x2 3x3 4x4 12 36 76 132 13.2 39.6 83.6 145.2 In addition to calculate writing time and delay, programmer can also check the "Busy" status to know if font characters were written into the DDRAM. Please refer to the " Status Register" for the description of "Busy". RAiO TECHNOLOGY INC. 77/174 www.raio.com.tw RA8806 Preliminary Version 1.0 6-10-4 Font Vertical Display RA8806 features of its "Font Vertical Display" function. This function enables the normal display change to vertical display. This means the original 320x240 panel can be used as a 240x320 panel to display embedded character font or data in vertical way, and no need to change scan direction or the LCD driver layout. The LCD panel could display from both vertical and horizontal ways. This function is option on setting the Bit-3 of register WCCR. When WCCR Bit-3 =1 (Font Rotation Mode), the font character will be written in vertical display. Figure 6-50 shows the example of font vertical display. 0 0 0 0 15 7 Two Layers Character/Graphic LCD Controller 7 15 Normal Display Vertical Display Figure 6-50: Font Vertical Display Function Under the vertical display mode, the cursor moves from the direction of up to down. And the cursor display is also differing to normal display mode. (Please refer to Section 6-13-4 "Cursor Width and Height" for detail descriptions). Due to the advance rotate function, if user chose a 240x160 module, then it will be very easy to use same module but as an 160x240 module. The following Figure 6-51 shows the example of 320x240 panel rotate to as 240X320 application. In normal mode, if write text font "RAIO" then the screen show as (1) of Figure 6-51. If set the T90DEG(Bit-3 of REG[10h]) = 1 and CDIR(Bit-0 of REG[01h]) = 1 first, then write text font "RAIO", the screen will show as (2) of Figure 6-51. COM239 SEG0 SEG0 COM0 SEG319 COM0 RAiO RAiO COM239 (1) 320x240 for Normal use SEG319 (2) As a 240x320 Application T90DEG = 1 , CDIR = 1 Figure 6-51 : Font Display in Rotate Mode RAiO TECHNOLOGY INC. 78/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller The relative register list about font rotation function is: Table 6-31 Reg. WCCR MISC Bit_Num Bit 3 Bit 0 Description Font rotation mode enable COM direction selection Reference REG[10h] REG[01h] Besides the cursor display function, the other functions in the font rotation mode work as the same behavior as normal mode, including: 1) Font enlargement function 2) Full alignment function 3) Line Gap adjustment function 4) Scroll function RAiO TECHNOLOGY INC. 79/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6-11 User-Defined Font The RA8806 embedded a 512Byte CGRAM for user to create new character. The user could create font, special symbol or pattern in this memory. If user only uses one DDRAM, then the other one could also use as CGRAM. Therefore, the RA8806 provides 3 regions for user to create new character(symbol or pattern) as following: 1. 512 Bytes CGRAM 2. 9.6K Bytes DDRAM1 (When user only shows DDRAM2 data on screen) 3. 9.6K Bytes DDRAM2 (When user only shows DDRAM1 data on screen) Table 6-32 : Font Code for User-Created Region CGRAM DDRAM1 DDRAM2 Size 512 bytes 9.6 Kbytes 9.6 Kbytes Code and Range Half-Size : 8F00h ~ 8F1Fh Full-Size : 9F00h ~ 9F0Fh Half-Size : 8000h ~ 8E27h Full-Size : 9000h ~ 9E13h Half-Size : 8000h ~ 8E27h Full-Size : 9000h ~ 9E13h Capacity 32 Half-Size chars 16 Full-Size chars 600 Half-Size chars 300 Full-Size chars 600 Half-Size chars 300 Full-Size chars 6-11-1 Create Font in CGRAM The CGRAM is a 512Byte RAM, so it could create 32 Half-Size or 16 Full-Size characters. The Table 6-33 is the font code mapping table in CGRAM. Note the font codes were fix in RA8806. And the Font# was defined in Bit[3:0] of REG[CURY]. Table 6-33 : CGRAM Font Code Mapping Table Font# Code 0 1 2 3 4 5 6 7 Half-Size 8F00 8F01 8F02 8F03 8F04 8F05 8F06 8F07 8F08 8F09 8F0A 8F0B 8F0C 8F0D 8F0E 8F0F Full-Size Font# Code 9F00 9F01 9F02 9F03 9F04 9F05 9F06 9F07 8 9 10 11 12 13 14 15 Half-Size 8F10 8F11 8F12 8F13 8F14 8F15 8F16 8F17 8F18 8F19 8F1A 8F1B 8F1C 8F1D 8F1E 8F1F Full-Size 9F08 9F09 9F0A 9F0B 9F0C 9F0D 9F0E 9F0F RAiO TECHNOLOGY INC. 80/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 7654321076543210 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 76543210 (1) Full-size Font (2) Half-size Font Figure 6-52 : Example of Created Font Bit-map Data According to the user-created font register setting in CGRAM, please refer to the below table. Table 6-34 : Register Definition for Created-font in CGRAM Reg. MAMR Bit_Num Bit 7 Bit [6:4] Bit [1:0] Description Cursor Increase enable Display mode Select memory for write cycle The Bit[4:0] is the address for writing bit-map data of create font. When create a full-size font, normally set to 0. When create an odd half-size font, normally set to 0, and set 10h for even font. Indicate which font code data will be created. REG[12h] Reference CURX Bit [4:0] REG[60h] CURY Bit [3:0] REG[70h] RAiO TECHNOLOGY INC. 81/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller CGRAM Create Font Set the CURX to 0(First byte in font) Set MAMR to access CGRAM Set display data is DDRAM1 or DDRAM2 Set CURY (It indicates which font will be created) (*1) Write memory write command (B0h) and write the font data sequentially. (*2) Write the corresponding code to show the font on active display layer (*3) Figure 6-53 : The Flow-chart of User-created Font on CGRAM Note: 1. CGRAM contains 512 bytes and can contain 16 16x16 full-size or 32 8x16 half-size usercreated font. Each full-size font contains 32bytes. 2. For created full-size font, after CURY is assign(0~15) and CURX is set to 0, a created-font bit-map can be filled by the 32 continuous memory writes cycle. And then CURY will be increased by 1. Please refer the following Program Example(1). The result is show (1) of Figure 6-52 on screen. 3. For created half-size font, after CURY is assign(0~15) and CURX is set to 0(odd font) or 10h(even font), a created-font bit-map can be filled by the 16 continuous memory writes cycle. Please refer the following Program Example(2). The result is show (2) of Figure 6-52 on screen. 4. The CGRAM font code is 8F00~8F1F for Half-size font, and 9F00~9F0Fh for full-size font. Refer to Table 6-32. Program Example(1): // Create a full-size font in CGRAM and show on the screen. // font_data[] = {00, 00, 07, 1F, 20, 67, 68, 04, 1A, 15, 16, 15, 12, 1F, 00, 00, // 00, 00, E0, F8, 04, E6, 16, 90, 58, A8, 68, A8, 48, F8, 00, 00} Access_CGRAM(); Only_Show_DDRAM1(); LCD_CMDWrite( CURY ); LCD_DataWrite( 0x05 ); LCD_CMDWrite( CURX ); LCD_DataWrite( 0x00 ); LCD_CMDWrite( MWrite ); for( i = 0; i < 32; i++ ) { LCD_DataWrite( font_data[i] ); Delay2us(50); } LCD_GotoXY( 5 , 5 ); LCD_CMDWrite( MWrite ); LCD_DataWrite( 0x9F ); LCD_DataWrite( 0x05 ); // MAMR[1:0] = 00b // MAMR[6:4] = 001b // Create 6th full-size character // Write font-data from 1st byte // B0h, Memory write command // 32 continuous write for font bit-map // Set Cursor position ( 5 , 5 ) // Corresponding font code( 9F05h ) // Show as (1) of Figure 6-52 RAiO TECHNOLOGY INC. 82/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Program Example(2): // Create a half-size font in CGRAM and show on the screen. // font_data[] = {00, 82, 44, 28, FE, 10, 10, 10, FE, 10, 10, 38, 54, 92, 10, 00} Access_CGRAM(); Only_Show_DDRAM1(); LCD_CMDWrite( CURY ); LCD_DataWrite( 0x02 ); LCD_CMDWrite( CURX ); LCD_DataWrite( 0x10 ); LCD_CMDWrite( MWrite ); for( i = 0; i < 16; i++ ) { LCD_DataWrite( font_data[i] ); Delay2us(50); } LCD_GotoXY( 5 , 5 ); LCD_CMDWrite( MWrite ); LCD_DataWrite( 0x8F ); LCD_DataWrite( 0x05 ); 6-11-2 Create Font in DDRAM The DDRAM are 9.6KByte RAM, so it could create 600 Half-Size or 300 Full-Size characters. Table 6-36 is the font code mapping table in DDRAM for Half-Size characters. Table 6-37 is the font code mapping table in DDRAM for Full -Size characters. These font codes were also fix in RA8806. The register CURX and CURY are used to point the address that bit-map data to create font. According to the register setting of user-created font in DDRAM, please refer to the below table. Table 6-35 : Register Definition for Created-font in DDRAM Reg. MAMR Bit_Num Bit 7 Bit [6:4] Bit [1:0] CURX CURY Bit [5:0] Bit [7:0] Description Cursor Increase enable Display mode Select memory for write cycle Both registers are Indicate which font code data will be created. REG[60h] REG[70h] REG[12h] Reference // MAMR[1:0] = 00b // MAMR[6:4] = 001b // Create 6th half-size char // Write font-data from 1st byte // B0h, Memory write command // 16 continuous write for font bit-map Two Layers Character/Graphic LCD Controller // Set Cursor position ( 5 , 5 ) // Corresponding font code( 8F05h ) // Show as (2) of Figure 6-52 RAiO TECHNOLOGY INC. 83/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Table 6-36 : DDRAM1 and DDRAM2 Half-size Font Code Mapping 0 CURX CURY 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 00 10 20 30 40 50 60 70 80 90 A0 B0 C0 D0 E0 0 1 1 2 2 26 26 27 27 8000 8001 8002 8100 8101 8102 8200 8201 8202 8300 8301 8302 8400 8401 8402 8500 8501 8502 8600 8601 8602 8700 8701 8702 8800 8801 8802 8900 8901 8902 8A00 8A01 8A02 8B00 8B01 8B02 8C00 8C01 8C02 8D00 8D01 8D02 8E00 8E01 8E02 8026 8027 8126 8127 8226 8227 8326 8327 8426 8427 8526 8527 8626 8627 8726 8727 8826 8827 8926 8927 8A26 8A27 8B26 8B27 8C26 8C27 8D26 8D27 8E26 8E27 Table 6-37 : DDRAM1 and DDRAM2 Full-size Font Code Mapping Table 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 CURX 0 1 2 3 4 5 6 7 8 9 A B C D E F 10 11 12 13 1415 16 17 18 19 1A1B 1C1D1E 1F 20 21 22 23 24 25 26 27 CURY 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 00 10 20 30 40 50 60 70 80 90 A0 B0 C0 D0 E0 9000 9001 9002 9003 9004 9005 9006 9007 9008 9009 900A 900B 900C 900D 900E 900F 9010 9011 9012 9013 9100 9101 9102 9103 9104 9105 9106 9107 9108 9109 910A 910B 910C 910D 910E 910F 9110 9111 9112 9113 9200 9201 9202 9203 9204 9205 9206 9207 9208 9209 920A 920B 920C 920D 920E 920F 9210 9211 9212 9213 9300 9301 9302 9303 9304 9305 9306 9307 9308 9309 930A 930B 930C 930D 930E 930F 9310 9311 9312 9313 9400 9401 9402 9403 9404 9405 9406 9407 9408 9409 940A 940B 940C 940D 940E 940F 9410 9411 9412 9413 9500 9501 9502 9503 9504 9505 9506 9507 9508 9509 950A 950B 950C 950D 950E 950F 9510 9511 9512 9513 9600 9601 9602 9603 9604 9605 9606 9607 9608 9609 960A 960B 960C 960D 960E 960F 9610 9611 9612 9613 9700 9701 9702 9703 9704 9705 9706 9707 9708 9709 970A 970B 970C 970D 970E 970F 9710 9711 9712 9713 9800 9801 9802 9803 9804 9805 9806 9807 9808 9809 980A 980B 980C 980D 980E 980F 9810 9811 9812 9813 9900 9901 9902 9903 9904 9905 9906 9907 9908 9909 990A 990B 990C 990D 990E 990F 9910 9911 9912 9913 9A00 9A01 9A02 9A03 9A04 9A05 9A06 9A07 9A08 9A09 9A0A 9A0B 9A0C 9A0D 9A0E 9A0F 9A10 9A11 9A12 9A13 9B00 9B01 9B02 9B03 9B04 9B05 9B06 9B07 9B08 9B09 9B0A 9B0B 9B0C 9B0D 9B0E 9B0F 9B10 9B11 9B12 9B13 9C00 9C01 9C02 9C03 9C04 9C05 9C06 9C07 9C08 9C09 9C0A 9C0B 9C0C 9C0D 9C0E 9C0F 9C10 9C11 9C12 9C13 9D00 9D01 9D02 9D03 9D04 9D05 9D06 9D07 9D08 9D09 9D0A 9D0B 9D0C 9D0D 9D0E 9D0F 9D10 9D11 9D12 9D13 9E00 9E01 9E02 9E03 9E04 9E05 9E06 9E07 9E08 9E09 9E0A 9E0B 9E0C 9E0D 9E0E 9E0F 9E10 9E11 9E12 9E13 RAiO TECHNOLOGY INC. 84/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Start Access DDRAM1 ( REG[12h] [1:0] = 0 1 ) Show DDRAM2 ( REG[12h] [6:4] = 010 ) Set Graphic Mode ( REG[00h] B3 = 0 ) Set Cursor shifting Direction, vertical first then horizontal ( REG[12h] B7 = 1 ) Set XY -axis ( X, Y ) ( Set REG[60h],[70h] ) Write Right-half font data to DDRAM1 Set XY -axis ( X, Y ) ( Set REG[60h],[70h] ) Write Left-half font data to DDRAM1 Y add 1 (Set REG[70h]) Yes Y add 1 (Set REG[70h]) Write font data that already defined at DDRAM1 to DDRAM2 Set Cursor shifting Direction, horizontal first then vertical ( REG[12h] B7 = 0 ) Yes X add 1 (Set REG[60h]) Set Text Mode ( REG[00h] B3 = 1 ) N0 Write 16 bytes data ? Access Page2 ( REG[12h] [1:0] = 1 0 ) Set XY -axis ( X, Y ) and execute Memory Write CMD Write 16 bytes data ? N0 Figure 6-54 : Flowchart of User-created font in DDRAM1 The above flow-chart is an example to create a Full-size in DDRAM1 and show the new font on screen(DDRAM2). At first, user have to set up the CURX and CURY to define which code data will be created, and then write 32Bytes bit-map data to DDRAM1. The CURX need to set twice for each 16Bytes data - the left and right of full-size font. Please refer the following Program Example(3). If we want to create a full-size font as (1) of Figure 6-52 to mapping code - 9205h in Table 6-37. The result is show (1) of Figure 6-52 on screen. RAiO TECHNOLOGY INC. 85/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Program Example(3): // Create a full-size font in DDRAM1 and show on the screen. // font_data[] = {00, 00, 07, 1F, 20, 67, 68, 04, 1A, 15, 16, 15, 12, 1F, 00, 00, // 00, 00, E0, F8, 04, E6, 16, 90, 58, A8, 68, A8, 48, F8, 00, 00} Access_DDRAM1(); Only_Show_DDRAM2(); LCD_Graphic(); Cursor_Shift_Direct_VH(); // MAMR[1:0] = 01 // MAMR[6:4] = 010 // WLCR. Bit-3 = 0 // MAMR. Bit-7 = 1 // Set the cursor moving in vertical // Write the left part of full-size font // Memory write command Two Layers Character/Graphic LCD Controller LCD_GotoXY(0x0A, 0x20); LCD_CMDWrite( MWrite ); for(i=0;i<16;i++) { LCD_DataWrite(font_data_L[i]); Delay2us(50); } LCD_GotoXY(0x0B, 0x20); // Write the right part of full-size font LCD_CMDWrite( MWrite ); // Memory write command for(i=16;i<32;i++) { LCD_DataWrite(font_data_R[i]); Delay2us(50); } Access_DDRAM2(); LCD_Text(); Cursor_Shift_Direct_HV(); LCD_GotoXY( 3 , 3 ); LCD_CMDWrite( MWrite ); LCD_DataWrite(0x92); LCD_DataWrite(0x05); Delay2us(50); // MAMR[1:0] = 10 // WLCR.Bit-3 = 1 // MAMR. Bit-7 = 0 // set coordinate to ( 3 , 3 ) // Memory write command // Write the code(9205h) of user-defined font // Show as (1) of Figure 6-52 RAiO TECHNOLOGY INC. 86/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6-11-3 Create Symbol RA8806 provides font creator function that allows user to design and create new fonts, special symbols or logos and store into its embedded CGRAM or DDRAM. The user-created characters each defined as a full-size (16x16) or half-size (8x16) character bitmap font formats, thus 24x16, 40x16, 16x32 or bigger sized fonts are also possible to create accordingly. The following Figure 6-55 represents a user created symbol with size 24x16. Figure 6-55 : A 24x16 Symbol Example For creating a new symbol, in addition to write command to CGRAM or DDRAM, note the setting of the font codes before trying to write characters to be displayed. See the following 2 examples of creating this 24x16 symbol in DDRAM: When the first address - (CURX, CURY) of data write to DDRAM is (0, 0), the font code of this symbol are 0x8000, 0x8001 and 0x8002, as Figure 6-56 below: When the first address of date write to DDRAM is (2, 10h), the font code of this symbol are 0x81050x81060x8107 and so on. Please refer the following Program Example(4). The result is show Figure 6-55 on screen. Font Code 0x8105 Font Code 0x8106 Font Code0x8107 Figure 6-56 : Font Code of User's Created Symbol for Program Example(4) RAiO TECHNOLOGY INC. 87/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Program Example(4): // Create a 24x16 symbol in DDRAM1 and show on the screen. // font_data[] = {00, 02, 06, 0A, 12, 23, 40, 80, 40, 23, 12, 0A, 06, 02, 00, 00, // 00, 00, 00, 00, 00, FF, 00, 00, 00, FF, 00, 00, 00, 00, 00, 00, // 00, 80, C0, A0, 90, 88, 04, 02, 04, 88, 90, A0, C0, 80, 00, 00} Access_DDRAM1(); Only_Show_DDRAM2(); LCD_Graphic(); Cursor_Shift_Direct_VH(); // MAMR[1:0] = 01 // MAMR[6:4] = 010 // WLCR. Bit-3 = 0 // MAMR. Bit-7 = 1 // Set the cursor moving in vertical // Write the left part of symbol // Memory write command Two Layers Character/Graphic LCD Controller LCD_GotoXY(0x02, 0x10); LCD_CMDWrite( MWrite ); for(i=0;i<16;i++) { LCD_DataWrite(font_data_L[i]); Delay2us(50); } LCD_GotoXY(0x03, 0x10); // Write the middle part of symbol LCD_CMDWrite( MWrite ); // Memory write command for(i=16;i<32;i++) { LCD_DataWrite(font_data_R[i]); Delay2us(50); } LCD_GotoXY(0x04, 0x10); // Write the right part of symbol LCD_CMDWrite( MWrite ); // Memory write command for(i=32;i<48;i++) { LCD_DataWrite(font_data_R[i]); Delay2us(50); } Access_DDRAM2(); LCD_Text(); Cursor_Shift_Direct_HV(); LCD_GotoXY( 3 , 3 ); LCD_CMDWrite( MWrite ); LCD_DataWrite(0x81); LCD_DataWrite(0x02); LCD_DataWrite(0x81); LCD_DataWrite(0x03); LCD_DataWrite(0x81); LCD_DataWrite(0x04); Delay2us(50); // MAMR[1:0] = 10 // WLCR.Bit-3 = 1 // MAMR. Bit-7 = 0 // set coordinate to ( 3 , 3 ) // Memory write command // Write the code(8105h, 8102, 8103) of symbol // Show as Figure 6-56 Besides, note the display address for each of the font code to be display on the LCD screen, especially under Rotate 90 degree and Font Enlargement mode. RAiO TECHNOLOGY INC. 88/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6-12 Scroll Function 6-12-1 Horizontal Scrolling The RA8806 provide Horizontal Scrolling function. You can assign an area by Register BGSG and EDSG. Once start the horizontal scrolling, the assigned area will shift step by step and each step is 8 pixels width. About Horizontal Scrolling register setting, please refer to the list below. Table 6-38 Reg. ADSR BGSG EDSG BGCM EDCM Bit_Num Bit 2 Bit 1 Bit 0 Bit [5:0] Bit [5:0] Bit [7:0] Bit [7:0] Description SCR_DIR(Scroll direction) SCR_HV(Scroll Horizontal/Vertical) SCR_EN(Scroll Enable) The SEG start address in scroll mode The SEG end address in scroll mode The COM start address in scroll mode The COM end address in scroll mode REG[61h] REG[62h] REG[71h] REG[72h] REG[03h] Reference (1)Flowchart: The flow-chart of horizontal scrolling is as following: Start Set Scrolling Window Boundary ( Set REG[61h],[62h],[71h],[72h]) Write Chinese font filled with the screen Set Scrolling Direction, Left to Right ( Set REG[03h][2:1] = 0 0 ) Enable Scrolling Function ( REG[03h]B0 = 1 ) Figure 6-57 : Horizontal Scrolling RAiO TECHNOLOGY INC. 89/174 www.raio.com.tw RA8806 Preliminary Version 1.0 (2)Program Example: LCD_Text(); // Text Mode //================================================ // Set Scrolling Window //================================================ LCD_CmdWrite(0x61); // SEG Start Position of Scrolling Mode LCD_DataWrite(0x05); LCD_CmdWrite(0x62); // SEG End Position of Scrolling Mode LCD_DataWrite(0x22); LCD_CmdWrite(0x71); LCD_DataWrite(0x20); LCD_CmdWrite(0x72); LCD_DataWrite(0xd0); // COM Start Position of Scrolling Mode // COM End Position of Scrolling Mode Two Layers Character/Graphic LCD Controller for( i = 0 ; i < 300 ; i++ ) // Write the font to fill the screen { LCD_DataWrite( RAiO [ i ] ); Delay2us(50); } //================================================ // Set Scrolling Direction and Enable scroll function //================================================ LCD_CmdWrite(0x03); LCD_DataWrite(0x01); // L R // LCD_DataWrite(0x05); // R L RAiO TECHNOLOGY INC. 90/174 www.raio.com.tw RA8806 Preliminary Version 1.0 6-12-2 Vertical Scrolling The RA8806 also provide Vertical Scrolling function. You can start the scrolling by control Register ADSR Bit-2. Once start the vertical scrolling, the whole screen will shift step by step and each step is 1 pixel height. (1)Flowchart: The flow-chart of vertical scrolling is as following: Start Two Layers Character/Graphic LCD Controller Set Scrolling Window Boundary ( Set REG[61h],[62h],[71h],[72h]) Write Chinese font filled with the screen Set Scrolling Direction, Top to Bottom ( Set REG[03h][2:1] = 0 1 ) Enable Scrolling Function ( REG[03h]B0 = 1 ) Figure 6-58 : Vertical Scrolling (2)Program Example: LCD_Text(); LCD_CmdWrite(0x61); LCD_DataWrite(0x05); LCD_CmdWrite(0x62); LCD_DataWrite(0x22); LCD_CmdWrite(0x71); LCD_DataWrite(0x20); LCD_CmdWrite(0x72); LCD_DataWrite(0xd0); // Text Mode // SEG Start Position of Scrolling Mode // SEG End Position of Scrolling Mode // COM Start Position of Scrolling Mode // COM End Position of Scrolling Mode for( i = 0 ; i < 300 ; i++ ) // Fill Chinese font on the screen { LCD_DataWrite( RAiO [ i ] ); Delay2us(50); } LCD_CmdWrite(0x03); LCD_DataWrite(0x03); // LCD_DataWrite(0x07); // Scrolling Enable // T B // B T RAiO TECHNOLOGY INC. 91/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6-13 Cursor 6-13-1 Cursor Position and Shift The cursor-moving unit of segment is one byte(or eight pixels). But the moving unit of common is one pixel. The cursor position is controlled by Register CURX and CURY for both text and graphics mode. You can also setup the Auto-Increase mode for write to DDRAM or read data from DDRAM. The cursor-moving boundary depends on the active window. 6-13-2 Full Alignment The "Full alignment function" provides the "Auto-Align" feature when full-size and half-size characters combined display. Programmer can adjust it from the settings of Bit-6 of WCCR. (Refer to register WCCR for detail description.) When Bit-6 is 1, the auto-align feature is enabled. When Bit-6 is 0, the auto-align feature is not being used. The Figure 6-59 and Figure 6-60 shows the above settings. With full alignment function Figure 6-59 : Font Write with Full Alignment RAiO TECHNOLOGY INC. 92/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Without full alignment function Figure 6-60 : Font Write without Full Alignment When the "Full-alignment" feature is used, the display shows all the full-size characters start from the set start address. And there will be an even bytes alignment space between these fonts. For half-size character, the function doesn't restrict the position of it. 3. Line changing and alignment setting is reset 1. Cursor set at 5'th bytes 2. write characters cursor CASE 1 Figure 6-61 : Full-alignment Example(1) The full-alignment display rule is base on cursor position be set at 1st row. After changing row, the alignment base is reset. That is, the start segment address of active window. There are serial conditions for the changing line with the full alignment feature. Please refer to below figures for the condition. RAiO TECHNOLOGY INC. 93/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 2. Write to the end of the line 3. Line changing and alignment setting is reset 1. Cursor set cursor CASE 2 Figure 6-62 : Full-alignment Example(2) 3. Line changing and alignment setting is reset 1. Cursor set 2. No enough space for writing a full-size character after consider full-alignment cursor CASE 3 Figure 6-63 : Full-alignment Example(3) RAiO TECHNOLOGY INC. 94/174 www.raio.com.tw RA8806 Preliminary Version 1.0 6-13-3 Cursor Blinking The user could control cursor On/Off or Blinking. The register [80h] BTMR is used to set up the blinking time. Blinking Time = BTMR[80h] Bit[7:0] x (1/Frame_Rate) 6-13-4 Cursor Width and Height The cursor height is controlled by register CHWI Bit[7:4], and the height is setting from 1 ~ 16 pixel. It does depend on user's requirement. In normal font, the cursor width fixed to one byte(8 pixels). And cursor's height is from 1~16pixels that depends on CHWI Bit[7:4]. In vertical font, the cursor height fixed to 16 pixels, and width is from 1~8 pixels that depends on CHWI Bit[6:4]. See Figure 6-64 and Figure 6-65 as following. Two Layers Character/Graphic LCD Controller Cursor movement for Normal-Font Cursor movement for Vertical-Font Figure 6-64 : Cursor Movement Cursor Size(Height) for Normal-Font 1 pixel 2 pixel 3 pixel 16 pixel Cursor Size(Width) for Vertical-Font 1 pixel 2 pixel 3 pixel 8 pixel Figure 6-65 : Cursor Size RAiO TECHNOLOGY INC. 95/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6-14 Extension Mode for Display Normally the maximum support resolution of RA8806 is 320x240 dots. But RA8806 support a special display mode - Extension mode. And the maximum support resolution is 640x240 or 320x480 dots. In Extension mode, the dual DDRAM data can be show on the bigger panel. This mode is set by the Bit[6:4] of register MAMR. Please refer to Figure 6-67 of the example by using 640x240 panel, and Figure 6-68 by using 320x480 panel. Com/Seg Signals LCD Panel Max. 320x240 RA8806 LCD Driver Normal Mode Com/Seg Signals LCD Panel Max. 640x240 or Max. 320x480 Extension Mod RA8806 LCD Driver Figure 6-66 : Maximum Resolution for RA8806 320 320 240 DDRAM1 Data DDRAM2 Data Figure 6-67 : Extension Mode(1) Register MAMR Bit[6:4] = 110h If MAMR Bit[6:4] = 110b, then RA8806 supports maximum resolution is 640x240 pixels. The left side of screen shows the DDRAM1 data, the right side shows the DDRAM2 data. Please refer to Figure 6-67. If MAMR Bit[6:4] = 111b, then RA8806 supports maximum resolution is 320x480 pixels. The up side of screen shows the DDRAM1 data, the down side shows the DDRAM2 data. Please refer to Figure 6-68. RAiO TECHNOLOGY INC. 96/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 320 240 DDRAM1 Data 240 DDRAM2 Data Figure 6-68 : Extension Mode(2) Register MAMR Bit[6:4] = 111h Note that the extension mode is only display the combination of the DDRAM1 and DDRAM2 data. The cursor movement or characters display is not continuous across them. So user must set two pages separately on the screen. The RA8806 will combine the DDRAM1 and DDRAM2 data as a single display in extension mode. So, there is some limitation on Extension Mode. For example, if RA8806 set to Extension Mode(1) as Figure 6-67 for 640x240 dots panel. The data have to write into DDRAM1 and DDRAM2. But the cursor moving of Common is not from 0 to 639. The users have to separate the screen into 2 blocks and write data into DDRAM1 and DDRAM2 to create a complete 640x240 dots picture. The Figure 6-69 shows the description. : : : : : : : : : : DDRAM1 DDRAM2 Figure 6-69Extension Mode(1) Cursor Moving Of course, if use Horizontal Scrolling, then the screen is like the following Figure 6-70. RAiO TECHNOLOGY INC. 97/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller DDRAM1 DDRAM2 Figure 6-70Extension Mode(1) Horizontal Scrolling But if RA8806 use Extension mode(2) like Figure 6-68 for 320x480 dots panel, then the cursor moving is same as normal mode - the Common is from 0 to 319. The data scan of DDRAM is as Figure 6-71. The effect of Horizontal Scrolling is show as Figure 6-72. DDRAM1 : : : : : DDRAM2 : : : : : Figure 6-71Extension Mode(2) Cursor Moving DDRAM1 DDRAM2 Figure 6-72Extension Mode(2) Horizontal Scrolling RAiO TECHNOLOGY INC. 98/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 6-15 Eliminating Flicker Mode RA8806 also provides "Eliminating Flicker Mode" in order to eliminate display errors at scan/MPU confliction. When the scan logic is processing scan task and at the same time the DDRAM is accessed by the MPU, the scan data will force to get a wrong one and may experience side effects such as "snow". When the flicker or "snow" is too much, it will infect the display effect. Therefore, RA8806 is designed to disable scan logic when MPU is accessing the DDRAM. And after it is completed, the scan logic active again. The "Eliminating Flicker Mode" separate Write and Read operating therefore no confliction will happen between scan logic and MPU cycle. That is, no data will lose. Ideally, it will have great improvement at display effect. In the real application, sometimes the access method will cause a side effect for that the scan waveform of each row will vary by the MPU write cycle. The length of scan waveform for each row will different when data access frequently. In some condition, the display effect is poor. According to the real experiment result, we find that the display effect is perfect at graphic mode to use the "Eliminating Flicker Mode". We suggest user can consider adapting it by their real application display effect. Figure 6-73 : Eliminating Flicker Mode Table 6-39 Reg. MISC Bit_Num Bit 7 Description The LCD Driver-Scan will auto-pending when busy. Reference REG[01h] RAiO TECHNOLOGY INC. 99/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 7. Package Information 7-1 Bonding Pad CLK_OUT TESTMD TESTI ZRST XG XD DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 ZRD ZWR VDDP GNDP RS CS2 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 RA8806 Logo ZCS1 PWM_OUT PWM_OUT X1 Y1 X2 Y2 AVDD AGND RA8806 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 INT BUSY VDDH VDD GND FR LP YD XCK ZDOFF LD7 LD6 LD5 LD4 LD3 LD2 LD1 LD0 GNDP Figure 7-1 : RA8806 Bonding Pad RAiO TECHNOLOGY INC. KIN0 KIN1 KIN2 KIN3 KIN4 KIN5 KIN6 KIN7 KOUT0 KOUT1 KOUT2 KOUT3 KOUT4 KOUT5 KOUT6 KOUT7 DB MI DW VDDP 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 100/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 7-2 Pad X/Y Coordinate Table 7-1 : RA8806 Pad Coordinate Pad No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 Pad Name GNDP LD0 LD1 LD2 LD3 LD4 LD5 LD6 LD7 ZDOFF XCK YD LP FR GND VDD VDDH BUSY INT AGND AVDD Y2 X2 Y1 X1 PWM_OUT PWM_OUT ZCS1 CS2 RS GNDP VDDP ZWR ZRD X 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2301.05 2119.80 2004.80 1887.70 1772.70 1659.80 1544.80 Y -1649.70 -1536.80 -1421.80 -1306.80 -1191.80 -1076.80 -961.80 -846.80 -731.80 -616.80 -501.80 -386.80 -271.80 -156.80 -39.70 75.30 186.10 303.20 418.20 702.20 817.20 934.30 1049.30 1164.30 1279.30 1394.30 1509.30 1624.30 1833.05 1833.05 1833.05 1833.05 1833.05 1833.05 Pad No. 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 Pad Name DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 XD XG ZRST TESTI TESTMD CLK_OUT KIN0 KIN1 KIN2 KIN3 KIN4 KIN5 KIN6 KIN7 KOUT0 KOUT1 KOUT2 KOUT3 KOUT4 KOUT5 KOUT6 KOUT7 DB MI DW VDDP X 1429.80 1314.80 1199.80 1084.80 969.80 854.80 739.80 624.80 509.80 394.80 279.80 164.80 49.80 -65.20 -65.20 49.80 164.80 279.80 394.80 509.80 624.80 739.80 854.80 969.80 1084.80 1199.80 1314.80 1429.80 1544.80 1659.80 1774.80 1889.80 2004.80 2121.90 Y 1833.05 1833.05 1833.05 1833.05 1833.05 1833.05 1833.05 1833.05 1833.05 1833.05 1833.05 1833.05 1833.05 1833.05 -1833.05 -1833.05 -1833.05 -1833.05 -1833.05 -1833.05 -1833.05 -1833.05 -1833.05 -1833.05 -1833.05 -1833.05 -1833.05 -1833.05 -1833.05 -1833.05 -1833.05 -1833.05 -1833.05 -1833.05 RAiO TECHNOLOGY INC. 101/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 7-3 Pin Assignment CLK_OUT NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC KIN0 KIN1 KIN2 KIN3 KIN4 KIN5 KIN6 KIN7 KOUT0 KOUT1 KOUT2 KOUT3 KOUT4 KOUT5 KOUT6 KOUT7 DB MI DW 80 75 70 65 60 55 NC 50 85 90 RAiO RA8806L2N-T 08XX-N Date Code (Year 2008) 5 10 15 20 25 TM 45 40 95 35 100 30 TESTMD TESTI ZRST XG XD NC DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 ZRD ZWR VDDP GNDP RS CS2 AVDD Pin #1 Figure 7-2 : LQFP-100Pin Pin Assignment KIN0 CLK_OUT NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC KIN1 KIN2 KIN3 KIN4 KIN5 KIN6 KIN7 KOUT0 KOUT1 KOUT2 KOUT3 KOUT4 KOUT5 KOUT6 KOUT7 DB MI VDDP GNDP LD0 60 55 50 45 NC 40 65 RAiO TM 35 70 RA8806T1N-S 08XX-N Date Code(Year 2008) 30 75 25 80 5 ZDOFF LD2 LD3 XCK GND LP FR YD 10 BUSY AGND INT VDD VDDH 15 AVDD X2 Y2 Y1 X1 20 PWM_OUT TESTMD TESTI ZRST XG XD DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 ZRD ZWR VDDP GNDP RS CS2 ZCS1 Pin #1 LD1 Figure 7-3 : TQFP-80Pin Pin Assignment RAiO TECHNOLOGY INC. 102/174 PWM_OUT LD7 ZDOFF AGND VDDP BUSY GNDP NC NC VDDH ZCS1 XCK X2 GND LD5 INT YD LD0 LD1 LD2 LD3 LD4 LD6 LP FR Y2 VDD Y1 X1 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 7-4 Package Dimension Pin-1 Index b RAiO RA8806L2N-S/T E1 E e 08xx-N Seating Plane 0.10mm Detail A D1 D TM 2 1 C A2 R2 R1 A 0.25mm Gauge Plane A1 Detail A 3 L1 L Figure 7-4 : LQFP-100Pin Mechanical RAiO TECHNOLOGY INC. 103/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Table 7-2 : LQFP-100 Package Dimension Symbols A A1 A2 b c e D D1 E E1 L L1 R1 R2 1 2 3 0.08 0.08 0 0 11 11 0.45 Dimensions in Millimeters Min. -0.05 1.35 0.22 0.09 Typ. --1.40 0.3 -0.65 BSC. 22.00 BSC. 20.00 BSC. 16.00 BSC. 14.00 BSC. 0.60 1.00 Ref. --3.5 -12 12 -0.20 7 -13 13 0.003 0.003 0 0 11 11 0.75 0.018 Max. 1.60 0.15 1.45 0.33 0.16 Min. -0.002 0.053 0.009 0.004 Dimensions in Inches Typ. --0.055 0.012 -0.026 BSC. 0.866 BSC. 0.787 BSC. 0.630 BSC. 0.551 BSC. 0.024 0.039 Ref. --3.5 -12 12 -0.008 7 -13 13 0.030 Max. 0.063 0.006 0.057 0.013 0.006 Note: Dimension "D1" and "E1" do not include mold protrusion. Allowable protrusion is 0.25mm per side. "D1" and "E1" are maximum plastic body size dimensions including mold mismatch. RAiO TECHNOLOGY INC. 104/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Figure 7-5 : TQFP-80Pin Mechanical RAiO TECHNOLOGY INC. 105/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Table 7-3 : TQFP-80 Package Dimension Symbols A A1 A2 b b1 c c1 e D D1 E E1 L L1 R1 R2 0.08 0.08 0 11.90 9.90 11.90 9.90 0.45 Dimensions in Millimeters Min. -0.05 0.95 0.13 0.13 0.09 0.09 Typ. -0.10 1.00 0.18 0.16 -0.127 0.40 BSC. 12.00 10.00 12.00 10.00 0.60 1.00 Ref. --3 -0.20 7 0.003 0.003 0 12.10 10.10 12.10 10.10 0.75 0.469 0.390 0.469 0.390 0.018 Max. 1.20 0.15 1.05 0.23 0.19 0.20 0.16 Min. -0.002 0.037 0.005 0.005 0.004 0.004 Dimensions in Inches Typ. -0.004 0.039 0.007 0.006 -0.005 0.016 BSC. 0.472 0.394 0.472 0.394 0.024 0.040 Ref. --3 -0.008 7 0.476 0.398 0.476 0.398 0.030 Max. 0.047 0.006 0.041 0.009 0.007 0.008 0.006 RAiO TECHNOLOGY INC. 106/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 7-5 Part Number Table 7-4 : Part Number Product Name (Full Name) RA8806L2N-T LQFP-100 RA8806L2N-S RA8806L2N-J RA8806T1N-T RA8806T1N-S RA8806T1N-J RA8806-T RA8806-S Notes: 1. In Extension Mode, the maximum resolution is 640x240 or 320x480. See Section 6-14 "Extension Mode and Display". 2. In both Traditional and Simple Chinese font, it built-in 52 basic Japanese font. 3. LCD driver data bus of RA8806T1N is 4-bits. 4. All of the parts of RA008 are RoHS compliance and pass the detection of free PFOS and PFOA. Table 7-5 : RA8806L2N vs. RA8806T1N Difference Package LCD Data Bus RA8806L2N LQFP-100Pins 20mm x 14mm 4-bits or 8-bits RA8806T1N TQFP-80Pins 10mm x 10mm 4-bits Die 320x240 (Note 1) TQFP-80 (10x10) (20x14) Resolution Package (Max) Font ROM Traditional Chinese (Note 2) Simple Chinese (Note 2) Japanese Kanji Traditional Chinese (Note 2, 3) Simple Chinese (Note 2, 3) Japanese Kanji (Note 3) Traditional Chinese Simple Chinese ASCII ROM ISO-8859-1 ~ 4 ISO-8859-1 ~ 4 ISO-8859-1 ~ 4 ISO-8859-1 ~ 4 ISO-8859-1 ~ 4 ISO-8859-1 ~ 4 ISO-8859-1 ~ 4 ISO-8859-1 ~ 4 RoHs Compliance Yes Yes Yes Yes Yes Yes Yes Yes RAiO TECHNOLOGY INC. 107/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 8. Electrical Characteristic 8-1 Absolute Maximum Ratings Table 8-1 : Absolute Maximum Ratings Parameter Supply Voltage Range Input Voltage Range Power Dissipation Operation Temperature Range Storage Temperature Soldering temperature (10 seconds). See Note 1. Symbol VDD VIN PD TOPR TST TSOLDER Rating -0.3 to 6.5 -0.3 to VDD+0.3 300 -30 to +85 -45 to +125 260 Unit V V mW Notes: 1. The humidity resistance of the flat package may be reduced if the package is immersed in solder. Use a soldering technique that does not heat stress the package. 2. If the power supply has a high impedance, a large voltage differential can occur between the input and supply voltages. Take appropriate care with the power supply and the layout of the supply lines. 3. All supply voltages are referenced to Gnd = 0V. RAiO TECHNOLOGY INC. 108/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller 8-2 DC Characteristic Table 8-2 : DC Characteristic Parameter Operating Voltage Oscillator frequency External clock frequency DC to DC Output Voltage Input Input High Voltage Input Low Voltage Output Output High Voltage Output Low Voltage Schmitt-trigger Output High Voltage Output Low Voltage Input Leakage Current 1 Input Leakage Current 2 Operation Current Standby Mode Current (Normal Mode Current) Display Off Current Sleep Mode VOH VOL IIH IIL IOPR ISB IDISPLAY ISLP 0.5xVDD 0.2xVDD 0.7xVDD 0.3xVDD 0.8xVDD 0.5xVDD Symbol VDDP / VDD FOSC FCLK VDD Min. 2.4 4 4 2.8V Typ. 3.3/5.0 8 8 3.0 Max. 5.5 12 12 3.3 Unit V MHz MHz V Condition VDDH Open VDD = 5V VDD = 5V Add external 1uF Capacitor See Note 1, 3 See Note 1, 3 See Note 2, 3 See Note 2, 3 See Note 4 See Note 4 VIH VIL VOH VOL 0.8xVDD Gnd VDD-0.4 Gnd ----- VDD 0.2xVDD VDD VDD+0.4 V V V V V V A A mA mA mA A A A A --1 ----- --5 1.5 1.8 120 140 0.5 20 +1 -1 10 1.8 2.1 140 160 1 25 Case1 Case2 Case1 Case2 Case1 Case2 Notes: 1. ZCS1, CS2, ZWR, ZRD, RS, MI, DW, DB, KIN[7:0], TESTMD and TESTI are inputs. KIN[7:0] built-in pull up resistors. The TESTMD and TESTI built-in pull down resistors. 2. INT, BUSY, CLK_OUT, PWM_OUT, KOUT[7:0], LP, FR, YD, ZDOFF, XCK and LD[7:0] are outputs. 3. DATA[7:0] are Bi-direction. 4. The ZRST are Schmitt-trigger with pull-up input. The pulse width on ZRST must be at least 1024*tc. Note that pulses of more than a few seconds will cause DC voltages to be applied to the LCD panel. Case1: VDDP = VDD = AVDD = 3.3V, VDDH = NC, LCD Driver VDD = 5V, CLK = 4MHz, CLK_OUT: Off, Segment=160, Common=160, FRM = 78Hz, TA=25. Case2: VDDP = VDDH = 5V, VDD = AVDD = 3V, LCD Driver VDD = 3.3V, CLK = 4MHz, CLK_OUT: Off, Segment=160, Common=160, FRM = 78Hz, TA=25. RAiO TECHNOLOGY INC. 109/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Appendix A . Application Circuit Figure A-1 : Application Circuit for 3V or 5V RAiO TECHNOLOGY INC. 110/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Appendix B . Frame Rate Table Table B-1 : Frame Rate Table(1) Seg Com CLK (MHz) XCK=CLK/2 REG[01h] Bit[3:2] = 10 Frame Rate REG[90h] (Hz) ITCR 55 72 60 59 65 48 70 39 75 31 55 147 60 128 65 112 70 99 75 87 55 223 60 198 65 176 70 158 75 142 55 -60 -65 241 70 218 75 198 55 -60 -65 -70 -75 253 XCK=CLK/4 REG[01h] Bit[3:2] = 01 Frame Rate REG[90h] (Hz) ITCR 55 -60 -65 -70 -75 -55 34 60 24 65 16 70 9 75 3 55 72 60 59 65 48 70 39 75 31 55 109 60 94 65 80 70 69 75 59 55 147 60 128 65 112 70 99 75 87 XCK=CLK/8 REG[01h] Bit[3:2] = 00 Frame Rate REG[90h] (Hz) ITCR 55 -60 -65 -70 -75 -55 -60 -65 -70 -75 -55 -60 -65 -70 -75 -55 15 60 7 65 -70 -75 -55 34 60 24 65 16 70 9 75 3 320 320 320 320 320 320 320 320 320 320 320 320 320 320 320 320 320 320 320 320 320 320 320 320 320 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 4 4 4 4 4 6 6 6 6 6 8 8 8 8 8 10 10 10 10 10 12 12 12 12 12 4 4 4 4 4 6 6 6 6 6 8 8 8 8 8 10 10 10 10 10 12 12 12 12 12 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 167 148 132 119 107 --228 208 190 ---------------- 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 54 44 36 29 23 110 96 84 74 65 167 148 132 119 107 224 200 180 163 148 -253 228 208 190 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 -----25 18 12 7 3 54 44 36 29 23 82 70 60 52 44 110 96 84 74 65 RAiO TECHNOLOGY INC. 111/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Table B-2 : Frame Rate Table(2) CLK (MHz) XCK=CLK/2 REG[01h] Bit[3:2] = 10 Frame Rate (Hz) REG[90h] ITCR XCK=CLK/4 REG[01h] Bit[3:2] = 01 Frame Rate (Hz) ITCR XCK=CLK/8 REG[01h] Bit[3:2] = 00 Frame Rate (Hz) REG[90h] ITCR Seg Com 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 160 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 4 4 4 4 4 6 6 6 6 6 8 8 8 8 8 10 10 10 10 10 12 12 12 12 12 4 4 4 4 4 6 6 6 6 6 8 8 8 8 8 10 10 10 10 10 12 12 12 12 12 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 187 168 152 139 127 --248 228 210 ---------------244 220 200 183 168 --------------------- 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 74 64 56 49 43 130 116 104 94 85 187 168 152 139 127 244 220 200 183 168 --248 228 210 102 90 80 72 64 173 155 140 127 116 244 220 200 183 168 ---239 220 ------ 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 17 12 8 5 2 45 38 32 27 23 74 64 56 49 43 102 90 80 72 64 130 116 104 94 85 31 25 20 16 12 67 58 50 44 38 102 90 80 72 64 138 123 110 100 90 173 155 140 127 116 RAiO TECHNOLOGY INC. 112/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Table B-3 : Frame Rate Table(3) CLK (MHz) XCK=CLK/2 REG[01h] Bit[3:2] = 10 Frame Rate (Hz) REG[90h] ITCR XCK=CLK/4 REG[01h] Bit[3:2] = 01 Frame Rate (Hz) REG[90h] ITCR XCK=CLK/8 REG[01h] Bit[3:2] = 00 Frame Rate (Hz) REG[90h] ITCR Seg Com 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 4 4 4 4 4 6 6 6 6 6 8 8 8 8 8 10 10 10 10 10 12 12 12 12 12 4 4 4 4 4 6 6 6 6 6 8 8 8 8 8 10 10 10 10 10 12 12 12 12 12 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 224 200 180 163 148 ----253 ----------------------------------------- 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 82 70 60 52 44 153 135 120 107 96 224 200 180 163 148 --240 219 200 ----253 224 200 180 163 148 ----253 ---------------- 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 55 60 65 70 75 11 5 ---47 38 30 24 18 82 70 60 52 44 118 103 90 80 70 153 135 120 107 96 82 70 60 52 44 153 135 120 107 96 224 200 180 163 148 --240 219 200 ----253 Note: The value of ITCR is in decimal. RAiO TECHNOLOGY INC. 113/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Appendix C . Font Table - ASCII When Bit-7 of register "FNCR" is "0", the contents of ASCII Block Tables 1-4 are show as following Table C1~ Table C-3. Table C-1 : ASCII Block 1 H L 0 123 45 67 8 9 A BC D E F 0 1 2 3 4 5 6 7 8 9 A B C D E F RAiO TECHNOLOGY INC. 114/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Table C-2 : ASCII Block 2 H L 0 12 3 45 67 89ABCDEF 0 1 2 3 4 5 6 7 8 9 A B C D E F RAiO TECHNOLOGY INC. 115/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Table C-3 : ASCII Block 3 H L 0 1 23 45 67 89ABCDEF 0 1 2 3 4 5 6 7 8 9 A B C D E F RAiO TECHNOLOGY INC. 116/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Table C-4 : ASCII Block 4 H L 0 1234 567 89ABCDEF 0 1 2 3 4 5 6 7 8 9 A B C D E F RAiO TECHNOLOGY INC. 117/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller When Bit-7 of register "FNCR" is "1", the contents of ASCII Block Tables 1-4 are show as following Table C5 ~ Table C-8. Table C-5 shows the standard character encoding of ISO/IEC 8859-1. ISO means International Organization for Standardization. The ISO 8859-1 also less formally called "Latin-1" is he first eight-bits coded character sets that developed by the ISO. It refers to ASCII that consisting of 192 characters from the Latin script in range 0xA0-0xFF. This character encoding is used throughout Western Europe, includes Albanian, Afrikaans, Breton, Danish, Faroese, Frisian, Galician, German, Greenlandic, Icelandic, Irish, Italian, Latin, Luxembourgish, Norwegian, Portuguese, Rhaeto-Romanic, Scottish Gaelic, Spanish, Swedish. English letters with no accent marks also can use ISO 8859-1. In addition, it also commonly used in many languages outside Europe, such as Swahili, Indonesian, Malaysian and Tagalog. Table C-5 : ASCII Block 1(ISO 8859-1) RAiO TECHNOLOGY INC. 118/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Table C-6 shows the standard characters of ISO/IEC 8859-2. ISO 8859-2 also cited as Latin-2 is the part 2 of the eight-bits coded character sets developed by ISO/IEC 8859. These code values can be used in almost any data interchange system to communicate in the following European languages : Croatian, Czech, Hungarian, Polish, Slovak, Slovenian, and Upper Sorbian. The Serbian, English, German, Latin can use ISO 8859-2 as well. Furthermore it is suitable to represent some western European languages like Finnish (with the exception of a used in Swedish and Finnish) Table C-6 : ASCII Block 2(ISO 8859-2) RAiO TECHNOLOGY INC. 119/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Table C-7 shows the standard characters of ISO/IEC 8859-3. ISO 8859-3 also known as Latin-3 or "South European" is an eight-bits character encoding, third part of the ISO 8859 standard. It was designed originally to cover Turkish, Maltese and Esperanto, though the introduction of ISO 8859-9 superseded it for Turkish. The encoding remains popular with users of Esperanto and Maltese, though it also supports English, German, Italian, Latin and Portuguese. Table C-7 : ASCII Block 3(ISO 8859-3) RAiO TECHNOLOGY INC. 120/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Table C-8 shows the standard characters of ISO/IEC 8859-4. ISO 8859-4 is known as Latin-4 or " North European"is the forth part of the ISO 8859 eight-bits character encoding. It was designed originally to cover Estonian, Greenlandic, Latvian, Lithuanian, and Sami. This character set also supports Danish, English, Finnish, German, Latin, Norwegian, Slovenian, and Swedish. Table C-8 : ASCII Block 4(ISO 8859-4) RAiO TECHNOLOGY INC. 121/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Appendix D . Font Table - GB Code RAiO TECHNOLOGY INC. 122/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 123/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 124/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 125/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 126/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 127/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 128/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 129/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 130/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 131/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 132/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 133/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 134/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 135/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 136/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 137/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 138/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 139/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 140/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 141/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 142/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller RAiO TECHNOLOGY INC. 143/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller Appendix E . Font Table - BIG-5 Code A1 4 5 6 7 0 * 1 x 2 / 3 4 5 ` 6 - ' 7 " 8 -- " 9 ... A2 4 5 6 7 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 0 A3 4 5 6 7 0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 RAiO TECHNOLOGY INC. 144/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller A4 4 5 6 7 0 1 2 3 4 5 6 7 8 9 A5 4 5 6 7 0 1 2 3 4 5 6 7 8 9 A6 4 5 6 7 0 1 2 3 4 5 6 7 8 9 Example: The BIG-5 code of "" is A4, A4, and BIG-5 code of "" is A5, 40. RAiO TECHNOLOGY INC. 145/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller A7 4 5 6 7 0 1 2 3 4 5 6 7 8 9 A8 4 5 6 7 0 1 2 3 4 5 6 7 8 9 A9 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 146/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller AA 4 5 6 7 0 1 2 3 4 5 6 7 8 9 AB 4 5 6 7 0 1 2 3 4 5 6 7 8 9 AC 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 147/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller AD 4 5 6 7 0 1 2 3 4 5 6 7 8 9 AE 4 5 6 7 0 1 2 3 4 5 6 7 8 9 AF 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 148/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller B0 4 5 6 7 0 1 2 3 4 5 6 7 8 9 B1 4 5 6 7 0 1 2 3 4 5 6 7 8 9 B2 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 149/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller B3 4 5 6 7 0 1 2 3 4 5 6 7 8 9 B4 4 5 6 7 0 1 2 3 4 5 6 7 8 9 B5 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 150/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller B6 4 5 6 7 0 1 2 3 4 5 6 7 8 9 B7 4 5 6 7 0 1 2 3 4 5 6 7 8 9 B8 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 151/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller B9 4 5 6 7 0 1 2 3 4 5 6 7 8 9 BA 4 5 6 7 0 1 2 3 4 5 6 7 8 9 BB 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 152/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller BC 4 5 6 7 0 1 2 3 4 5 6 7 8 9 BD 4 5 6 7 0 1 2 3 4 5 6 7 8 9 BE 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 153/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller BF 4 5 6 7 0 1 2 3 4 5 6 7 8 9 C0 4 5 6 7 0 1 2 3 4 5 6 7 8 9 C1 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 154/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller C2 4 5 6 7 0 1 2 3 4 5 6 7 8 9 C3 4 5 6 7 0 1 2 3 4 5 6 7 8 9 C4 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 155/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller C5 4 5 6 7 0 1 2 3 4 5 6 7 8 9 C6 4 5 6 7 0 1 2 3 4 5 6 7 8 9 C7 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 156/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller C8 4 5 6 7 C9 4 5 6 7 0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 CA 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 157/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller CB 4 5 6 7 0 1 2 3 4 5 6 7 8 9 CC 4 5 6 7 CD 4 5 6 7 0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 RAiO TECHNOLOGY INC. 158/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller CE 4 5 6 7 0 1 2 3 4 5 6 7 8 9 CF 4 5 6 7 0 1 2 3 4 5 6 7 8 9 D0 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 159/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller D1 4 5 6 7 0 1 2 3 4 5 6 7 8 9 D2 4 5 6 7 0 1 2 3 4 5 6 7 8 9 D3 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 160/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller D4 4 5 6 7 0 1 2 3 4 5 6 7 8 9 D5 4 5 6 7 0 1 2 3 4 5 6 7 8 9 D6 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 161/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller D7 4 5 6 7 0 1 2 3 4 5 6 7 8 9 D8 4 5 6 7 0 1 2 3 4 5 6 7 8 9 D9 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 162/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller DA 4 5 6 7 0 1 2 3 4 5 6 7 8 9 DB 4 5 6 7 0 1 2 3 4 5 6 7 8 9 DC 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 163/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller DD 4 5 6 7 0 1 2 3 4 5 6 7 8 9 DE 4 5 6 7 0 1 2 3 4 5 6 7 8 9 DF 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 164/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller E0 4 5 6 7 0 1 2 3 4 5 6 7 8 9 E1 4 5 6 7 0 1 2 3 4 5 6 7 8 9 E2 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 165/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller E3 4 5 6 7 0 1 2 3 4 5 6 7 8 9 E4 4 5 6 7 0 1 2 3 4 5 6 7 8 9 E5 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 166/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller E6 4 5 6 7 0 1 2 3 4 5 6 7 8 9 E7 4 5 6 7 0 1 2 3 4 5 6 7 8 9 E8 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 167/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller E9 4 5 6 7 0 1 2 3 4 5 6 7 8 9 EA 4 5 6 7 0 1 2 3 4 5 6 7 8 9 EB 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 168/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller EC 4 5 6 7 0 1 2 3 4 5 6 7 8 9 ED 4 5 6 7 0 1 2 3 4 5 6 7 8 9 EE 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 169/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller EF 4 5 6 7 0 1 2 3 4 5 6 7 8 9 F0 4 5 6 7 0 1 2 3 4 5 6 7 8 9 F1 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 170/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller F2 4 5 6 7 0 1 2 3 4 5 6 7 8 9 F3 4 5 6 7 0 1 2 3 4 5 6 7 8 9 F4 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 171/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller F5 4 5 6 7 0 1 2 3 4 5 6 7 8 9 F6 4 5 6 7 0 1 2 3 4 5 6 7 8 9 F7 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 172/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller F8 4 5 6 7 0 1 2 3 4 5 6 7 8 9 F9 4 5 6 7 0 1 2 3 4 5 6 7 8 9 FA 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 173/174 www.raio.com.tw RA8806 Preliminary Version 1.0 Two Layers Character/Graphic LCD Controller FB 4 5 6 7 0 1 2 3 4 5 6 7 8 9 FC 4 5 6 7 0 1 2 3 4 5 6 7 8 9 FD 4 5 6 7 0 1 2 3 4 5 6 7 8 9 RAiO TECHNOLOGY INC. 174/174 www.raio.com.tw |
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